Ticket #9323: 0002-Fix-fillrect-acceleration.patch

drivers/video/via/accel.c

@@ -20 +20 @@
  */
 #include "global.h"
 
+static u_int8_t via_eng_reg[] = {
+        [REG_GECMD]             = VIA_REG_GECMD,
+        [REG_GEMODE]    = VIA_REG_GEMODE,
+        [REG_SRCPOS]    = VIA_REG_SRCPOS,
+        [REG_DSTPOS]    = VIA_REG_DSTPOS,
+        [REG_DIMENSION] = VIA_REG_DIMENSION,
+        [REG_FGCOLOR]   = VIA_REG_FGCOLOR,
+        [REG_BGCOLOR]   = VIA_REG_BGCOLOR,
+        [REG_SRCBASE]   = VIA_REG_SRCBASE,
+        [REG_DSTBASE]   = VIA_REG_DSTBASE,
+        [REG_PITCH]             = VIA_REG_PITCH,
+        [REG_MONOPATFGC]        = VIA_REG_FGCOLOR,
+        [REG_MONOPATBGC]        = VIA_REG_BGCOLOR,
+};
+
 /* Somehow, the M1 engine has the registers in slightly different
  * locations than previous 2D acceleration engines */
 static u_int8_t via_m1_eng_reg[] = {
-        [VIA_REG_GECMD]         = VIA_REG_GECMD_M1,
-        [VIA_REG_GEMODE]        = VIA_REG_GEMODE_M1,
-        [VIA_REG_SRCPOS]        = VIA_REG_SRCPOS_M1,
-        [VIA_REG_DSTPOS]        = VIA_REG_DSTPOS_M1,
-        [VIA_REG_DIMENSION]     = VIA_REG_DIMENSION_M1,
-        [VIA_REG_PATADDR]       = VIA_REG_PATADDR_M1,
-        [VIA_REG_FGCOLOR]       = VIA_REG_FGCOLOR_M1,
-        [VIA_REG_BGCOLOR]       = VIA_REG_BGCOLOR_M1,
-        [VIA_REG_CLIPTL]        = VIA_REG_CLIPTL_M1,
-        [VIA_REG_CLIPBR]        = VIA_REG_CLIPBR_M1,
-        [VIA_REG_OFFSET]        = VIA_REG_OFFSET_M1,
-        [VIA_REG_KEYCONTROL]    = VIA_REG_KEYCONTROL_M1,
-        [VIA_REG_SRCBASE]       = VIA_REG_SRCBASE_M1,
-        [VIA_REG_DSTBASE]       = VIA_REG_DSTBASE_M1,
-        [VIA_REG_PITCH]         = VIA_REG_PITCH_M1,
-        [VIA_REG_MONOPAT0]      = VIA_REG_MONOPAT0_M1,
-        [VIA_REG_MONOPAT1]      = VIA_REG_MONOPAT1_M1,
+        [REG_GECMD]             = VIA_REG_GECMD_M1,
+        [REG_GEMODE]    = VIA_REG_GEMODE_M1,
+        [REG_SRCPOS]    = VIA_REG_SRCPOS_M1,
+        [REG_DSTPOS]    = VIA_REG_DSTPOS_M1,
+        [REG_DIMENSION] = VIA_REG_DIMENSION_M1,
+        [REG_FGCOLOR]   = VIA_REG_FGCOLOR_M1,
+        [REG_BGCOLOR]   = VIA_REG_BGCOLOR_M1,
+        [REG_SRCBASE]   = VIA_REG_SRCBASE_M1,
+        [REG_DSTBASE]   = VIA_REG_DSTBASE_M1,
+        [REG_PITCH]             = VIA_REG_PITCH_M1,
+        [REG_MONOPATFGC]        = VIA_REG_MONOPATFGC_M1,
+        [REG_MONOPATBGC]        = VIA_REG_MONOPATBGC_M1,
 };
 
 #if defined(CONFIG_FB_VIA_CAMERA) || defined(CONFIG_FB_VIA_CAMERA_MODULE)
@@ -64 +74 @@
         if (viaparinfo->chip_info->twod_engine == VIA_2D_ENG_M1 &&
             reg < ARRAY_SIZE(via_m1_eng_reg))
                 reg = via_m1_eng_reg[reg];
+        else if (reg < ARRAY_SIZE(via_eng_reg))
+                reg = via_eng_reg[reg];
 
         writel(val, viaparinfo->io_virt + reg);
 }
@@ -272 +284 @@
                 dwGEMode |= VIA_GEM_8bpp;
                 break;
         }
-        viafb_2d_writel(dwGEMode, VIA_REG_GEMODE);
+        viafb_2d_writel(dwGEMode, REG_GEMODE);
 
         /* Set source and destination base */
         base = ((void *)info->screen_base - viafb_FB_MM);
-        viafb_2d_writel(base >> 3, VIA_REG_SRCBASE);
-        viafb_2d_writel(base >> 3, VIA_REG_DSTBASE);
+        viafb_2d_writel(base >> 3, REG_SRCBASE);
+        viafb_2d_writel(base >> 3, REG_DSTBASE);
 
         /* Set source and destination pitch (128bit aligned) */
         pitch = (viaparinfo->hres * viaparinfo->bpp >> 3) >> 3;
         pitch_reg = pitch | (pitch << 16);
         if (viaparinfo->chip_info->twod_engine != VIA_2D_ENG_M1)
                 pitch_reg |= VIA_PITCH_ENABLE;
-        viafb_2d_writel(pitch_reg, VIA_REG_PITCH);
+        viafb_2d_writel(pitch_reg, REG_PITCH);
 }
 
 void viafb_hw_cursor_init(void)

drivers/video/via/accel.h

@@ -91 +91 @@
 #define VIA_REG_DSTCOLORKEY_M1  0x04C       /* as same as VIA_REG_FG */
 #define VIA_REG_BGCOLOR_M1      0x050
 #define VIA_REG_SRCCOLORKEY_M1  0x050       /* as same as VIA_REG_BG */
-#define VIA_REG_MONOPATFGC_M1   0x058       /* Add BG color of Pattern. */
-#define VIA_REG_MONOPATBGC_M1   0x05C       /* Add FG color of Pattern. */
+#define VIA_REG_MONOPATFGC_M1   0x058       /* Add FG color of Pattern. */
+#define VIA_REG_MONOPATBGC_M1   0x05C       /* Add BG color of Pattern. */
 #define VIA_REG_COLORPAT_M1     0x100       /* from 0x100 to 0x1ff */
 
 /* VIA_REG_PITCH(0x38): Pitch Setting */
@@ -199 +199 @@
 
 #define MAXLOOP                 0xFFFFFF
 
+
+enum via_reg_lookup {
+    REG_GECMD,
+    REG_GEMODE,
+    REG_SRCPOS,
+    REG_DSTPOS,
+    REG_DIMENSION,
+    REG_FGCOLOR,
+    REG_BGCOLOR,
+    REG_SRCBASE,
+    REG_DSTBASE,
+    REG_PITCH,
+    REG_MONOPATFGC,
+    REG_MONOPATBGC
+};
+
 void viafb_2d_writel(u_int32_t val, u_int32_t reg);
 void viafb_init_accel(void);
 void viafb_init_2d_engine(void);

drivers/video/via/viafbdev.c

@@ -896 +896 @@
         viafb_set_2d_mode(info);
 
         /* BitBlt Destination Address */
-        viafb_2d_writel(((rect->dy << 16) | rect->dx), VIA_REG_DSTPOS);
+        viafb_2d_writel(((rect->dy << 16) | rect->dx), REG_DSTPOS);
         /* Dimension: width & height */
         viafb_2d_writel((((rect->height - 1) << 16) | (rect->width - 1)),
-                        VIA_REG_DIMENSION);
+                        REG_DIMENSION);
         /* Forground color or Destination color */
-        viafb_2d_writel(col, VIA_REG_FGCOLOR);
+        viafb_2d_writel(col, REG_MONOPATFGC);
         /* GE Command */
-        viafb_2d_writel((0x01 | 0x2000 | (rop << 24)), VIA_REG_GECMD);
+        viafb_2d_writel((0x01 | 0x2000 | (rop << 24)), REG_GECMD);
 
 }
 
@@ -938 +938 @@
         viafb_set_2d_mode(info);
 
         /* BitBlt Source Address */
-        viafb_2d_writel(((sy << 16) | sx), VIA_REG_SRCPOS);
+        viafb_2d_writel(((sy << 16) | sx), REG_SRCPOS);
         /* BitBlt Destination Address */
-        viafb_2d_writel(((dy << 16) | dx), VIA_REG_DSTPOS);
+        viafb_2d_writel(((dy << 16) | dx), REG_DSTPOS);
         /* Dimension: width & height */
         viafb_2d_writel((((area->height - 1) << 16) | (area->width - 1)),
-                        VIA_REG_DIMENSION);
+                        REG_DIMENSION);
         /* GE Command */
-        viafb_2d_writel((0x01 | direction | (0xCC << 24)), VIA_REG_GECMD);
+        viafb_2d_writel((0x01 | direction | (0xCC << 24)), REG_GECMD);
 
 }
 
@@ -981 +981 @@
         viafb_set_2d_mode(info);
 
         /* BitBlt Source Address */
-        viafb_2d_writel(0x0, VIA_REG_SRCPOS);
+        viafb_2d_writel(0x0, REG_SRCPOS);
         /* BitBlt Destination Address */
-        viafb_2d_writel(((image->dy << 16) | image->dx), VIA_REG_DSTPOS);
+        viafb_2d_writel(((image->dy << 16) | image->dx), REG_DSTPOS);
         /* Dimension: width & height */
         viafb_2d_writel((((image->height - 1) << 16) | (image->width - 1)),
-                        VIA_REG_DIMENSION);
+                        REG_DIMENSION);
         /* fb color */
-        viafb_2d_writel(fg_col, VIA_REG_FGCOLOR);
+        viafb_2d_writel(fg_col, REG_FGCOLOR);
         /* bg color */
-        viafb_2d_writel(bg_col, VIA_REG_BGCOLOR);
+        viafb_2d_writel(bg_col, REG_BGCOLOR);
         /* GE Command */
-        viafb_2d_writel(0xCC020142, VIA_REG_GECMD);
+        viafb_2d_writel(0xCC020142, REG_GECMD);
 
         for (i = 0; i < size / 4; i++) {
                 writel(*udata, viaparinfo->io_virt + VIA_MMIO_BLTBASE);