diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 0514fb4..e992c7e 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -44,77 +44,77 @@
#interrupt-cells = <1>;
reg = <0xd4282000 0x1000>;
mrvl,intc-nr-irqs = <64>;
- };
- intcmux4@d4282150 {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <4>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x150 0x4>, <0x168 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <2>;
- };
+ intcmux4@150 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <4>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x150 0x4>, <0x168 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <2>;
+ };
- intcmux5: interrupt-controller@d4282154 {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <5>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x154 0x4>, <0x16c 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <2>;
- mrvl,clr-mfp-irq = <1>;
- };
+ intcmux5: interrupt-controller@154 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <5>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x154 0x4>, <0x16c 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <2>;
+ mrvl,clr-mfp-irq = <1>;
+ };
- intcmux9: interrupt-controller@d4282180 {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <9>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x180 0x4>, <0x17c 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <3>;
- };
+ intcmux9: interrupt-controller@180 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <9>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x180 0x4>, <0x17c 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <3>;
+ };
- intcmux17: interrupt-controller@d4282158 {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <17>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x158 0x4>, <0x170 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <5>;
- };
+ intcmux17: interrupt-controller@158 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <17>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x158 0x4>, <0x170 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <5>;
+ };
- intcmux35: interrupt-controller@d428215c {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <35>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x15c 0x4>, <0x174 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <15>;
- };
+ intcmux35: interrupt-controller@15c {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <35>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x15c 0x4>, <0x174 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <15>;
+ };
- intcmux51: interrupt-controller@d4282160 {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <51>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x160 0x4>, <0x178 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <2>;
- };
+ intcmux51: interrupt-controller@160 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <51>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x160 0x4>, <0x178 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <2>;
+ };
- intcmux55: interrupt-controller@d4282188 {
- compatible = "mrvl,mmp2-mux-intc";
- interrupts = <55>;
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x188 0x4>, <0x184 0x4>;
- reg-names = "mux status", "mux mask";
- mrvl,intc-nr-irqs = <2>;
+ intcmux55: interrupt-controller@188 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <55>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x188 0x4>, <0x184 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <2>;
+ };
};
};
diff --git a/arch/arm/boot/dts/xo-1-75.dts b/arch/arm/boot/dts/xo-1-75.dts
new file mode 100644
index 0000000..a4780f7
--- /dev/null
+++ b/arch/arm/boot/dts/xo-1-75.dts
@@ -0,0 +1,1010 @@
+/dts-v1/;
+
+/ {
+ name = [00];
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ model = "1C2";
+ architecture = "OLPC";
+ banner-name = "OLPC 1C2";
+ board-revision-int = <0x1c28>;
+ compatible = "olpc,xo-1.75";
+ serial-number = "Unknown";
+ ec-version = <0x4>;
+ ec-name = "1.0.00";
+ ec-date = "2012/07/28-05:53";
+ ec-user = "rsmith/keil";
+ interrupt-parent = <0x8b1ac>;
+ ranges;
+ phandle = <0x2c970>;
+
+ leds@0 {
+ name = "leds";
+ reg = <0x0 0x0>;
+ compatible = "gpio-leds";
+ phandle = <0xeaaac>;
+
+ storage-led {
+ name = "storage-led";
+ linux,default-trigger = "mmc-block";
+ gpios = <0x8d284 0xa 0x0>;
+ phandle = <0xeab28>;
+ };
+ };
+
+ ols {
+ name = "ols";
+ compatible = "olpc,xo-light-sensor";
+ phandle = <0xeaa34>;
+ };
+
+ switches@0 {
+ name = "switches";
+ compatible = "olpc,xo1.75-switch";
+ ebook-gpios = <0x8d284 0x80 0x1>;
+ lid-gpios = <0x8d284 0x81 0x1>;
+ reg = <0x0 0x0>;
+ phandle = <0xea4dc>;
+ };
+
+ nb-updater {
+ name = "nb-updater";
+ phandle = <0xe5044>;
+ };
+
+ log {
+ name = "log";
+ phandle = <0xd7e28>;
+ };
+
+ prober {
+ name = "prober";
+ phandle = <0xd790c>;
+ };
+
+ wakeup-rtc@d4010000 {
+ name = "wakeup-rtc";
+ compatible = "mrvl,mmp-rtc";
+ reg = <0xd4010000 0x1000>;
+ interrupts = <0x1 0x0>;
+ interrupt-parent = <0x8b864>;
+ interrupt-names = "rtc 1Hz", "rtc alarm";
+ clocks = <0x8ac9c 0x0>;
+ phandle = <0xd5f80>;
+ };
+
+ audio-complex {
+ name = "audio-complex";
+ compatible = "olpc,xo1.75-audio";
+ model = "OLPC XO";
+ audio-routing = "Headphone Jack", "HPOL", "Headphone Jack", "HPOR", "MIC2", "Mic Jack";
+ dai-link-name = "rt5631";
+ stream-name = "rt5631";
+ codec-dai-name = "rt5631-hifi";
+ codec-node = <0xc57f4>;
+ cpu-dai-node = <0xc5e78>;
+ platform-node = <0xc5c0c>;
+ phandle = <0xcaf88>;
+ };
+
+ audio@d42a0c00 {
+ name = "audio";
+ reg = <0xd42a0c00 0x100>;
+ compatible = "marvell,mmp3-sspa-dai", "marvell,mmp-sspa-dai";
+ clocks = <0x8a620 0x14>;
+ interrupts = <0x2>;
+ phandle = <0xc5e78>;
+ };
+
+ sspa@d42a0d00 {
+ name = "sspa";
+ reg = <0xd42a0d00 0x100>;
+ compatible = "marvell,mmp3-sspa-dai", "marvell,mmp-sspa-dai";
+ status = "unused";
+ clocks = <0x8a620 0x14>;
+ interrupts = <0x3>;
+ phandle = <0xc5d58>;
+ };
+
+ asram@e0000000 {
+ name = "asram";
+ reg = <0xe0000000 0x10000>;
+ compatible = "marvell,mmp-asram";
+ phandle = <0xc5cc4>;
+ };
+
+ pcm@0 {
+ name = "pcm";
+ adma-node = <0xc5b44>;
+ reg = <0x0 0x0>;
+ compatible = "marvell,mmp-pcm-audio";
+ phandle = <0xc5c0c>;
+ };
+
+ adma@d42a0800 {
+ name = "adma";
+ reg = <0xd42a0800 0x100>;
+ mmp-mav-dma-channels = <0x3 0x2>;
+ compatible = "marvell,mmp-audio-dma";
+ phandle = <0xc5b44>;
+ };
+
+ pcm@1 {
+ name = "pcm";
+ adma-node = <0xc5984>;
+ reg = <0x1 0x0>;
+ compatible = "marvell,mmp-pcm-audio";
+ status = "disabled";
+ phandle = <0xc5a6c>;
+ };
+
+ adma@d42a0900 {
+ name = "adma";
+ reg = <0xd42a0900 0x100>;
+ mmp-mav-dma-channels = <0x5 0x4>;
+ compatible = "marvell,mmp-audio-dma";
+ status = "disabled";
+ phandle = <0xc5984>;
+ };
+
+ camera@d420a000 {
+ name = "camera";
+ compatible = "marvell,mmpcam";
+ reg = <0xd420a000 0x800>;
+ clocks = <0x8a620 0x2>;
+ interrupts = <0x2a>;
+ gpios = <0x8d284 0x96 0x0 0x8d284 0x66 0x0>;
+ image-sensor = <0x90d7c>;
+ i2c-parent = <0x90b74>;
+ sensor = "OV7670";
+ phandle = <0xc0be4>;
+ };
+
+ ap-sp@d4290000 {
+ name = "ap-sp";
+ compatible = "olpc,ap-sp";
+ interrupts = <0x28>;
+ clocks = <0x8a620 0x8>;
+ reg = <0xd4290000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ phandle = <0xbd3b4>;
+
+ mouse@1 {
+ name = "mouse";
+ device_type = "mouse";
+ compatible = "pnpPNP,f03";
+ reg = <0x1>;
+ phandle = <0xbfcf4>;
+ };
+
+ keyboard@0 {
+ name = "keyboard";
+ reg = <0x0>;
+ compatible = "pnpPNP,303";
+ device_type = "keyboard";
+ keyboard-type = "us";
+ language = "EN";
+ phandle = <0xbdbfc>;
+ };
+ };
+
+ usb@d4208000 {
+ name = "usb";
+ reg = <0xd4208000 0x200>;
+ clocks = <0x8a620 0x5>;
+ interrupts = <0x2c>;
+ dr_mode = "host";
+ phy_type = "utmi";
+ transceiver = <0xb0338>;
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+ device_type = "ehci";
+ compatible = "marvell,pxau2o-ehci", "usb-ehci";
+ reg-names = "u2o";
+ usb-hub-test-list = "3,4,2";
+ phandle = <0xb0750>;
+
+ hub@0,0 {
+ name = "hub";
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+ reg = <0x0 0x0>;
+ assigned-address = <0x1>;
+ high-speed = [00];
+ protocol = <0x1>;
+ subclass = <0x0>;
+ class = <0x9>;
+ release = <0x7763>;
+ device-id = <0x608>;
+ vendor-id = <0x5e3>;
+ compatible = "usb5e3,608.7763", "usb5e3,608", "usb5e3,class9.0.1", "usb5e3,class9.0", "usb5e3,class9", "usb,class9.0.1", "usb,class9.0", "usb,class9", "usb,device";
+ vendor$ = [00];
+ device$ = "USB2.0 Hub";
+ serial$ = [00];
+ intr-in-pipe = <0x1>;
+ intr-in-interval = <0xc>;
+ intr-in-size = <0x1>;
+ configuration# = <0x1>;
+ device_type = "usb_hub";
+ hub20-dev = <0x1>;
+ phandle = <0xef1c0>;
+ };
+ };
+
+ usb2-phy@d4207000 {
+ name = "usb2-phy";
+ reg = <0xd4207000 0x100>;
+ compatible = "mrvl,mmp2-utmiphy";
+ phandle = <0xb0338>;
+ };
+
+ ec-spi@d4037000 {
+ name = "ec-spi";
+ compatible = "olpc,ec-spi";
+ reg = <0xd4037000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ interrupts = <0x14>;
+ clocks = <0x8ac9c 0x15>;
+ ack-gpios = <0x8d284 0x7d 0x1>;
+ cmd-gpios = <0x8d284 0x9b 0x1>;
+ int-gpios = <0x8d284 0x9a 0x1>;
+ phandle = <0xad45c>;
+ };
+
+ sd {
+ name = "sd";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ compatible = "simple-bus", "sdhci";
+ ranges = <0xd4280000 0xd4280000 0x2000 0xd4217000 0xd4217000 0x800>;
+ phandle = <0x9eb0c>;
+
+ sdhci@d4280000 {
+ name = "sdhci";
+ reg = <0xd4280000 0x800>;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc";
+ clk-delay-cycles = <0x1f>;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ interrupts = <0x27>;
+ clocks = <0x8a620 0x3>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x28 0x1>;
+ phandle = <0xe83b8>;
+
+ disk {
+ name = "disk";
+ iconname = "sdmmc";
+ device_type = "block";
+ slot-name = "external";
+ phandle = <0xe8970>;
+ };
+ };
+
+ sdhci@d4281000 {
+ name = "sdhci";
+ reg = <0xd4281000 0x800>;
+ non-removable;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc", "sdhci-pxav3";
+ clk-delay-cycles = <0x1f>;
+ interrupts = <0x35>;
+ clocks = <0x8a620 0xe>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x28 0x1>;
+ broken-cd;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ phandle = <0xabf64>;
+
+ disk {
+ name = "disk";
+ iconname = "sdmmc";
+ device_type = "block";
+ slot-name = "internal";
+ phandle = <0xac590>;
+ };
+ };
+
+ sdhci@d4280800 {
+ name = "sdhci";
+ reg = <0xd4280800 0x800>;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc", "sdhci-pxav3";
+ clk-delay-cycles = <0x1f>;
+ non-removable;
+ interrupts = <0x34>;
+ clocks = <0x8a620 0x4>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x32 0x1f4>;
+ broken-cd;
+ power-gpios = <0x8d284 0x22 0x0>;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ phandle = <0xa28e0>;
+
+ wlan {
+ name = "wlan";
+ module-type = "mv8686";
+ thin;
+ fullmac;
+ device_type = "wireless-network";
+ phandle = <0xa2f10>;
+ };
+ };
+ };
+
+ display@d420b000 {
+ name = "display";
+ reg = <0xd420b000 0x1000>;
+ compatible = "mrvl,pxa168fb";
+ clock-names = "LCDCLK";
+ clocks = <0x8a620 0x1>;
+ interrupts = <0x29>;
+ device_type = "display";
+ character-set = "ISO8859-1";
+ iso6429-1983-colors;
+ phandle = <0x98eac>;
+
+ panel {
+ name = "panel";
+ compatible = "mrvl,dumb-panel";
+ model = "OLPC DCON panel";
+ linux,timing-modes = <0x4b0 0x384 0x32 0x364aed0 0x18 0x1a 0x5 0x4 0x6 0x3 0x0 0x98 0x73>;
+ linux,mode-names = "1200x900@50";
+ lcd-dumb-ctrl-regval = <0x2000000d>;
+ lcd-pn-ctrl0-regval = <0x8001100>;
+ control-node = <0xe998c>;
+ phandle = <0xe979c>;
+ };
+ };
+
+ vmeta@f0400000 {
+ name = "vmeta";
+ reg = <0xf0400000 0x1000>;
+ compatible = "mrvl,mmp2-vmeta";
+ clocks = <0x8a620 0xa>;
+ interrupts = <0x1a>;
+ phandle = <0x98ddc>;
+ };
+
+ battery@0 {
+ name = "battery";
+ compatible = "olpc,xo1-battery";
+ reg = <0x0 0x0>;
+ phandle = <0x96084>;
+ };
+
+ mfg-data {
+ name = "mfg-data";
+ SN = "SHF00000000";
+ S# = "00000000-0000-0000-0000-000000000000";
+ phandle = <0x94a68>;
+ };
+
+ flash@d4035000 {
+ name = "flash";
+ clocks = <0x8ac9c 0x13>;
+ interrupts = <0x0>;
+ reg = <0xd4035000 0x100>;
+ #address-cells = <0x1>;
+ phandle = <0x93afc>;
+
+ dropins@20000 {
+ name = "dropins";
+ reg = <0x20000 0xe0000>;
+ phandle = <0x9408c>;
+ };
+ };
+
+ uart@d4016000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4016000 0x20>;
+ clocks = <0x8ac9c 0x20>;
+ interrupts = <0x2e>;
+ status = "disabled";
+ phandle = <0x927cc>;
+ };
+
+ uart@d4030000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4030000 0x20>;
+ interrupts = <0x1b>;
+ clocks = <0x8ac9c 0xa>;
+ phandle = <0x925fc>;
+ };
+
+ uart@d4017000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4017000 0x20>;
+ clocks = <0x8ac9c 0xb>;
+ interrupts = <0x1c>;
+ status = "disabled";
+ phandle = <0x923f4>;
+ };
+
+ uart@d4018000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4018000 0x20>;
+ clocks = <0x8ac9c 0xc>;
+ interrupts = <0x18>;
+ phandle = <0x92224>;
+ };
+
+ i2c@d4034000 {
+ name = "i2c";
+ linux,unit# = <0x4>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupt-parent = <0x8bb4c>;
+ interrupts = <0x4>;
+ clocks = <0x8ac9c 0x1f>;
+ reg = <0xd4034000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x91db4>;
+
+ accelerometer@19 {
+ name = "accelerometer";
+ compatible = "lis3lv02d";
+ reg = <0x19 0x1>;
+ phandle = <0xd6fa8>;
+ };
+ };
+
+ i2c@d4033000 {
+ name = "i2c";
+ linux,unit# = <0x5>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupt-parent = <0x8bb4c>;
+ interrupts = <0x2>;
+ clocks = <0x8ac9c 0x4>;
+ reg = <0xd4033000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x91944>;
+ };
+
+ i2c@d4031000 {
+ name = "i2c";
+ linux,unit# = <0x3>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupt-parent = <0x8bb4c>;
+ interrupts = <0x0>;
+ clocks = <0x8ac9c 0x2>;
+ reg = <0xd4031000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x914d4>;
+
+ rtc@68 {
+ name = "rtc";
+ compatible = "idt,idt1338-rtc";
+ reg = <0x68 0x1>;
+ phandle = <0xcb17c>;
+ };
+ };
+
+ i2c@d4011000 {
+ name = "i2c";
+ linux,unit# = <0x2>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupts = <0x7>;
+ clocks = <0x8ac9c 0x1>;
+ reg = <0xd4011000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x9108c>;
+
+ audio-codec@1a {
+ name = "audio-codec";
+ compatible = "realtek,rt5631", "realtek,alc5631";
+ reg = <0x1a 0x1>;
+ dai-name = "rt5631-hifi";
+ phandle = <0xc57f4>;
+ };
+ };
+
+ dcon-i2c {
+ name = "dcon-i2c";
+ compatible = "i2c-gpio";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ gpios = <0x8d284 0x6e 0x0 0x8d284 0xa1 0x0>;
+ phandle = <0x90e18>;
+
+ dcon@d {
+ name = "dcon";
+ compatible = "olpc,xo1.75-dcon", "olpc,xo1-dcon";
+ reg = <0xd 0x1>;
+ gpios = <0x8d284 0x64 0x0 0x8d284 0x65 0x0 0x8d284 0x8e 0x0 0x8d284 0x7c 0x0>;
+ gpio-names = "stat0", "stat1", "load", "irq";
+ phandle = <0xe998c>;
+ };
+ };
+
+ camera-i2c {
+ name = "camera-i2c";
+ compatible = "i2c-gpio";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ gpios = <0x8d284 0x6d 0x0 0x8d284 0x6c 0x0>;
+ phandle = <0x90b74>;
+
+ image-sensor@21 {
+ name = "image-sensor";
+ gpios = <0x8d284 0x96 0x0 0x8d284 0x66 0x0>;
+ reg = <0x21 0x1>;
+ compatible = "omnivision,ov7670";
+ phandle = <0x90d7c>;
+ };
+ };
+
+ cpus {
+ name = "cpus";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ phandle = <0x8fff4>;
+
+ cpu@0 {
+ name = "cpu";
+ device_type = "cpu";
+ reg = <0x0>;
+ phandle = <0x900d8>;
+ };
+ };
+
+ dropin-fs {
+ name = "dropin-fs";
+ phandle = <0x8fb38>;
+ };
+
+ null-nvram {
+ name = "null-nvram";
+ phandle = <0x8f9b0>;
+ };
+
+ mfpr@d401e000 {
+ name = "mfpr";
+ reg = <0xd401e000 0x1000>;
+ compatible = "mrvl,pxa-mfpr";
+ mrvl,pin-map = <0x0 0x3a 0x54 0x3b 0x49 0x280 0x4a 0x65 0x170 0x66 0x67 0x0 0x68 0xffffffff 0x1fc 0x69 0xffffffff 0x1f8 0x6a 0xffffffff 0x1f4 0x6b 0xffffffff 0x1f0 0x6c 0xffffffff 0x21c 0x6d 0xffffffff 0x218 0x6e 0xffffffff 0x214 0x6f 0xffffffff 0x200 0x70 0xffffffff 0x244 0x71 0xffffffff 0x25c 0x72 0xffffffff 0x164 0x73 0x7a 0x260 0x7b 0xffffffff 0x148 0x7c 0x8d 0xc 0x8e 0xffffffff 0x8 0x8f 0x97 0x220 0x98 0x98 0x248 0x9a 0x9b 0x254 0x9c 0x9f 0x14c 0xa0 0xffffffff 0x250 0xa1 0xffffffff 0x210 0xa2 0xffffffff 0x20c 0xa3 0xffffffff 0x208 0xa4 0xffffffff 0x204 0xa5 0xffffffff 0x1ec 0xa6 0xffffffff 0x1e8 0xa7 0xffffffff 0x1e4 0xa8 0xffffffff 0x1e0 0x15b 0x15c 0x140 0x15d 0x15e 0x2bc 0x159 0xffffffff 0x2c4 0x15f 0xffffffff 0x160 0xffffffff 0xffffffff 0xffffffff>;
+ phandle = <0x8dc48>;
+ };
+
+ gpio@d4019000 {
+ name = "gpio";
+ compatible = "mrvl,mmp-gpio", "";
+ reg = <0xd4019000 0x1000>;
+ interrupts = <0x31>;
+ interrupt-names = "gpio_mux";
+ gpio-controller;
+ #gpio-cells = <0x2>;
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ clocks = <0x8ac9c 0xd>;
+ clock-names = "GPIO";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x8d284>;
+
+ gpio@108 {
+ name = "gpio";
+ reg = <0x108 0x4>;
+ phandle = <0x8d6f4>;
+ };
+
+ gpio@104 {
+ name = "gpio";
+ reg = <0x104 0x4>;
+ phandle = <0x8d690>;
+ };
+
+ gpio@100 {
+ name = "gpio";
+ reg = <0x100 0x4>;
+ phandle = <0x8d62c>;
+ };
+
+ gpio@8 {
+ name = "gpio";
+ reg = <0x8 0x4>;
+ phandle = <0x8d5c8>;
+ };
+
+ gpio@4 {
+ name = "gpio";
+ reg = <0x4 0x4>;
+ phandle = <0x8d564>;
+ };
+
+ gpio@0 {
+ name = "gpio";
+ reg = <0x0 0x4>;
+ phandle = <0x8d500>;
+ };
+ };
+
+ timer@d4014000 {
+ name = "timer";
+ compatible = "mrvl,mmp-timer";
+ reg = <0xd4014000 0x100>;
+ interrupts = <0xd>;
+ clocks = <0x8ac9c 0x9>;
+ phandle = <0x8ccfc>;
+ };
+
+ interrupt-controller@d4282000 {
+ name = "interrupt-controller";
+ reg = <0xd4282000 0x1000>;
+ compatible = "mrvl,mmp2-intc";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ mrvl,intc-nr-irqs = <0x40>;
+ phandle = <0x8b1ac>;
+
+ interrupt-controller@188 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x37>;
+ reg = <0x188 0x4 0x184 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8bfa8>;
+ };
+
+ interrupt-controller@160 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x33>;
+ reg = <0x160 0x4 0x178 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8be34>;
+ };
+
+ interrupt-controller@15c {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0xf>;
+ interrupts = <0x23>;
+ reg = <0x15c 0x4 0x174 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8bcc0>;
+ };
+
+ interrupt-controller@158 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x5>;
+ interrupts = <0x11>;
+ reg = <0x158 0x4 0x170 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8bb4c>;
+ };
+
+ interrupt-controller@180 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x3>;
+ interrupts = <0x9>;
+ reg = <0x180 0x4 0x17c 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8b9d8>;
+ };
+
+ interrupt-controller@154 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x5>;
+ reg = <0x154 0x4 0x16c 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8b864>;
+ };
+
+ interrupt-controller@150 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x4>;
+ reg = <0x150 0x4 0x168 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8b6f0>;
+ };
+ };
+
+ apbc@d4015000 {
+ name = "apbc";
+ compatible = "marvell,mmp2-apbc", "mrvl,pxa-apbc";
+ reg = <0xd4015000 0x1000>;
+ #clock-cells = <0x1>;
+ clock-output-names = "RTC", "TWSI1", "TWSI2", "TWSI3", "TWSI4", "ONEWIRE", "KPC", "TB_ROTARY", "SW_JTAG", "TIMERS1", "UART1", "UART2", "UART3", "GPIO", "PWM0", "PWM1", "PWM2", "PWM3", "SSP0", "SSP1", "SSP2", "SSP3", "SSP4", "SSP5", "AIB", "ASFAR", "ASSAR", "USIM", "MPMU", "IPC", "TWSI5", "TWSI6", "UART4", "RIPC", "THSENS1", "CORESIGHT", "THSENS2", "THSENS3", "THSENS4";
+ clock-enable-registers = <0x0 0xf7 0x83 0x8000 0x4 0x77 0x3 0x18cba80 0x8 0x77 0x3 0x18cba80 0xc 0x77 0x3 0x18cba80 0x10 0x77 0x3 0x18cba80 0x14 0x77 0x3 0x18cba80 0x18 0x77 0x3 0x18cba80 0x1c 0x77 0x3 0x18cba80 0x20 0x77 0x3 0x18cba80 0x24 0x77 0x13 0x632ea0 0x2c 0x77 0x13 0x18cba80 0x30 0x77 0x13 0x18cba80 0x34 0x77 0x13 0x18cba80 0x38 0x77 0x3 0x18cba80 0x3c 0x77 0x3 0x18cba80 0x40 0x77 0x3 0x18cba80 0x44 0x77 0x3 0x18cba80 0x48 0x77 0x3 0x18cba80 0x4c 0x77 0x3 0x18cba80 0x50 0x77 0x3 0x18cba80 0x54 0x77 0x3 0x18cba80 0x58 0x77 0x3 0x18cba80 0x5c 0x77 0x3 0x18cba80 0x60 0x77 0x3 0x18cba80 0x64 0x77 0x3 0x18cba80 0x68 0x77 0x3 0x18cba80 0x6c 0x77 0x3 0x18cba80 0x70 0x77 0x3 0x18cba80 0x74 0x77 0x3 0x18cba80 0x78 0x77 0x3 0x18cba80 0x7c 0x77 0x3 0x18cba80 0x80 0x77 0x3 0x18cba80 0x88 0x77 0x13 0x18cba80 0x8c 0x77 0x3 0x18cba80 0x90 0x77 0x3 0x18cba80 0x94 0x7 0x3 0x18cba80 0x98 0x77 0x3 0x18cba80 0x9c 0x77 0x3 0x18cba80 0xa0 0x77 0x3 0x18cba80>;
+ phandle = <0x8ac9c>;
+ };
+
+ pmua@d4282800 {
+ name = "pmua";
+ compatible = "marvell,mmp2-apmu", "mrvl,pxa-apmu";
+ reg = <0xd4282800 0x1000>;
+ #clock-cells = <0x1>;
+ clock-output-names = "IRE", "DISPLAY1", "CCIC", "SDH1", "SDH2", "USB", "NF", "DMA", "WTM", "BUS", "VMETA", "GC", "SMC", "MSPRO", "SDH3", "SDH4", "CCIC2", "HSIC1", "FSIC3", "HSI", "AUDIO", "DISPLAY2", "ISP", "EPD", "APB2";
+ clock-enable-registers = <0x48 0x19 0x19 0x0 0x4c 0xfffff 0x71b 0x17d78400 0x50 0x3f 0x3f 0x0 0x54 0x1b 0x41b 0xbebc200 0x58 0x1b 0x1b 0xbebc200 0x5c 0x9 0x9 0x1c9c3800 0x60 0x1ff 0xbf 0x5f5e100 0x64 0x9 0x9 0x0 0x68 0x1b 0x1b 0x0 0x6c 0x1 0x1 0x0 0xa4 0x1b 0x1b 0x0 0xcc 0xf 0xf 0x0 0xd4 0x1b 0x1b 0x0 0xd8 0x3f 0x3f 0x0 0xe8 0x1b 0x1b 0xbebc200 0xec 0x1b 0x1b 0xbebc200 0xf4 0x3f 0x3f 0x0 0xf8 0x1b 0x1b 0x0 0x100 0x1b 0x1b 0x0 0x108 0x9 0x9 0x0 0x10c 0x13 0x13 0x0 0x110 0x1b 0x1b 0x0 0x224 0x1b 0x1b 0x0 0x144 0x21b 0x21b 0x0 0x134 0x12 0x12 0x0>;
+ phandle = <0x8a620>;
+ };
+
+ lzip {
+ name = "lzip";
+ phandle = <0x69668>;
+ };
+
+ osfile {
+ name = "osfile";
+ phandle = <0x66438>;
+ };
+
+ memory@0 {
+ name = "memory";
+ available = <0xcf000 0x3ef31000 0x1000 0xbf000>;
+ reg = <0x0 0x40000000>;
+ linux,usable-memory = <0x0 0x3f800000>;
+ phandle = <0x5d354>;
+ };
+
+ aliases {
+ name = "aliases";
+ ip = "//ip";
+ tcp = "ip//tcp";
+ http = "tcp//http";
+ httpd = "tcp//httpd:verbose";
+ smb = "tcp//cifs";
+ cifs = "tcp//cifs";
+ nfs = "net//obp-tftp:last//nfs";
+ rom = "/dropin-fs";
+ dropins = "/dropins";
+ screen = "/display";
+ mmc1 = "/sd/sdhci@d4280800";
+ net = "/wlan";
+ mouse = "/ap-sp/mouse";
+ keyboard = "/keyboard";
+ fsdisk = "int:0";
+ com1 = "/uart@d4018000";
+ serial0 = "/uart@d4030000";
+ serial1 = "/uart@d4017000";
+ serial2 = "/uart@d4018000";
+ serial3 = "/uart@d4016000";
+ mmc0 = "/sd/sdhci@d4281000";
+ mmc2 = "/sd/sdhci@d4280000";
+ int = "/sd/sdhci@d4281000/disk";
+ ext = "/sd/sdhci@d4280000/disk";
+ u = "/usb/disk";
+ last = "/sd/sdhci@d4281000/disk";
+ phandle = <0x30c48>;
+ };
+
+ options {
+ name = "options";
+ diag-switch? = "false";
+ security-mode;
+ security-#badlogins;
+ security-password;
+ nvramrc = [00];
+ use-nvramrc? = "false";
+ silent-mode? = "false";
+ screen-#rows = "999";
+ screen-#columns = "999";
+ ansi-terminal? = "true";
+ boot-device = "/sd/sdhci@d4281000/disk:\\boot\\vmlinuz";
+ boot-file = "ttyS2 root=/dev/mmcblk0p2";
+ diag-device = "net";
+ diag-file = [00];
+ watchdog-reboot? = "false";
+ auto-boot? = "true";
+ boot-command = "boot";
+ load-base = "201326592";
+ input-device = "keyboard";
+ output-device = "screen";
+ oem-banner? = "false";
+ oem-banner = [00];
+ oem-logo? = "false";
+ oem-logo;
+ local-mac-address? = "true";
+ ip-dns-server = [00];
+ ip-netmask = "255.255.255.0";
+ ip-domain = [00];
+ ip-router = [00];
+ ip-address = "dhcp";
+ fcode-debug? = "true";
+ client-symbols? = "false";
+ http-proxy = [00];
+ menu? = "true";
+ usb-delay = "350";
+ ramdisk = "/sd/sdhci@d4281000/disk:\\boot\\initrd.img";
+ auto-boot-countdown = [32 00];
+ phandle = <0x30bfc>;
+ };
+
+ openprom {
+ name = "openprom";
+ relative-addressing;
+ aligned-allocator;
+ model = "CL2 Q4D21jzQ4D";
+ source-url = "svn://openfirmware.info/openfirmware 3323M";
+ built-on = <0x1330559>;
+ phandle = <0x30b68>;
+ };
+
+ chosen {
+ name = "chosen";
+ stdout-#lines = <0x1e>;
+ clock = <0xfdbe15d8>;
+ memory = <0xfdbe3330>;
+ mmu = <0x0>;
+ nvram = <0xfdbe2938>;
+ bootpath = "/sd/sdhci@d4281000/disk:\\boot\\vmlinuz//ext2-file-system:\\boot\\vmlinuz";
+ bootargs = "ttyS2 root=/dev/mmcblk0p2";
+ domain-name = [00];
+ tftp-file = [00];
+ client-name = [00];
+ vendor-options = [00];
+ root-path = [00];
+ cpu = <0xfdbe1858>;
+ ramdisk = "/sd/sdhci@d4281000/disk:\\boot\\initrd.img//ext2-file-system:\\boot\\initrd.img";
+ stdin = <0xfd9fff08>;
+ stdout = <0xfd9ffec0>;
+ linux,initrd-start = <0xbb7dc00>;
+ linux,initrd-end = <0xc000000>;
+ phandle = <0x30b20>;
+ };
+
+ packages {
+ name = "packages";
+ phandle = <0x30a80>;
+
+ test-instructions {
+ name = "test-instructions";
+ phandle = <0xeb5d0>;
+ };
+
+ audio-test {
+ name = "audio-test";
+ phandle = <0xe5ad4>;
+ };
+
+ block-fifo {
+ name = "block-fifo";
+ phandle = <0xe3740>;
+ };
+
+ mux {
+ name = "mux";
+ phandle = <0x8f040>;
+ };
+
+ twsi {
+ name = "twsi";
+ phandle = <0x8df60>;
+ };
+
+ nfs {
+ name = "nfs";
+ phandle = <0x83218>;
+ };
+
+ null {
+ name = "null";
+ phandle = <0x82c70>;
+ };
+
+ supplicant {
+ name = "supplicant";
+ phandle = <0x78dd4>;
+ };
+
+ cifs {
+ name = "cifs";
+ phandle = <0x75538>;
+ };
+
+ http {
+ name = "http";
+ phandle = <0x74820>;
+ };
+
+ tcp {
+ name = "tcp";
+ phandle = <0x6f0c4>;
+ };
+
+ httpd {
+ name = "httpd";
+ phandle = <0x6c494>;
+ };
+
+ ip {
+ name = "ip";
+ phandle = <0x69880>;
+ };
+
+ zip-file-system {
+ name = "zip-file-system";
+ phandle = <0x65050>;
+ };
+
+ ext2-file-system {
+ name = "ext2-file-system";
+ phandle = <0x5eae4>;
+ };
+
+ disk-label {
+ name = "disk-label";
+ phandle = <0x55668>;
+ };
+
+ iso9660-file-system {
+ name = "iso9660-file-system";
+ support;
+ phandle = <0x547cc>;
+ };
+
+ fat-file-system {
+ name = "fat-file-system";
+ support;
+ phandle = <0x4f2e8>;
+ };
+
+ obp-tftp {
+ name = "obp-tftp";
+ phandle = <0x416c8>;
+ };
+
+ deblocker {
+ name = "deblocker";
+ disk-write-fix;
+ phandle = <0x40014>;
+ };
+
+ stringio {
+ name = "stringio";
+ phandle = <0x3ec50>;
+ };
+
+ terminal-emulator {
+ name = "terminal-emulator";
+ iso6429-1983-colors;
+ phandle = <0x3bdd0>;
+ };
+
+ client-services {
+ name = "client-services";
+ phandle = <0x30ab4>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/xo-4.dts b/arch/arm/boot/dts/xo-4.dts
new file mode 100644
index 0000000..6f29b12
--- /dev/null
+++ b/arch/arm/boot/dts/xo-4.dts
@@ -0,0 +1,1161 @@
+/dts-v1/;
+
+/ {
+ name = [00];
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ model = "4B1";
+ architecture = "OLPC";
+ banner-name = "OLPC 4B1";
+ board-revision-int = <0x4b18>;
+ compatible = "olpc,xo-cl4";
+ serial-number = "SHC2370000E";
+ ec-version = <0x4>;
+ ec-name = "0.2.01";
+ ec-date = "2012/09/15-03:20";
+ ec-user = "rsmith/keil";
+ interrupt-parent = <0x8b54c>;
+ ranges;
+ phandle = <0x2c970>;
+
+ leds@0 {
+ name = "leds";
+ reg = <0x0 0x0>;
+ compatible = "gpio-leds";
+ phandle = <0xf0368>;
+
+ storage-led {
+ name = "storage-led";
+ linux,default-trigger = "mmc-block";
+ gpios = <0x8dedc 0xa 0x0>;
+ phandle = <0xf03dc>;
+ };
+ };
+
+ ols {
+ name = "ols";
+ compatible = "olpc,xo-light-sensor";
+ phandle = <0xf02f0>;
+ };
+
+ switches@0 {
+ name = "switches";
+ compatible = "olpc,xo1.75-switch";
+ ebook-gpios = <0x8dedc 0x82 0x1>;
+ lid-gpios = <0x8dedc 0x81 0x1>;
+ reg = <0x0 0x0>;
+ phandle = <0xefd98>;
+ };
+
+ nb-updater {
+ name = "nb-updater";
+ phandle = <0xe6a24>;
+ };
+
+ log {
+ name = "log";
+ phandle = <0xd97ac>;
+ };
+
+ prober {
+ name = "prober";
+ phandle = <0xd9290>;
+ };
+
+ wakeup-rtc@d4010000 {
+ name = "wakeup-rtc";
+ compatible = "mrvl,mmp-rtc";
+ reg = <0xd4010000 0x1000>;
+ interrupts = <0x1 0x0>;
+ interrupt-parent = <0x8bc04>;
+ interrupt-names = "rtc 1Hz", "rtc alarm";
+ clocks = <0x8b03c 0x0>;
+ phandle = <0xd7904>;
+ };
+
+ thermal@d403b000 {
+ name = "thermal";
+ compatible = "marvell,mmp3-thermal";
+ reg = <0xd403b000 0x1000>;
+ interrupts = <0xb>;
+ interrupt-parent = <0x8ca8c>;
+ clocks = <0x8b03c 0x22 0x8b03c 0x24 0x8b03c 0x25 0x8b03c 0x26>;
+ clock-names = "THSENS1", "THSENS2", "THSENS3", "THSENS4";
+ phandle = <0xcc564>;
+ };
+
+ audio-complex {
+ name = "audio-complex";
+ compatible = "olpc,xo4-audio";
+ model = "OLPC XO";
+ audio-routing = "Headphone Jack", "HPOL", "Headphone Jack", "HPOR", "MIC2", "Mic Jack";
+ dai-link-name = "rt5631";
+ stream-name = "rt5631";
+ codec-dai-name = "rt5631-hifi";
+ codec-node = <0xc63c4>;
+ cpu-dai-node = <0xc6a48>;
+ platform-node = <0xc67dc>;
+ phandle = <0xcbb58>;
+ };
+
+ audio@c0ffdc00 {
+ name = "audio";
+ reg = <0xc0ffdc00 0x100>;
+ compatible = "marvell,mmp3-sspa-dai", "marvell,mmp-sspa-dai";
+ clocks = <0x8a6dc 0x14>;
+ interrupts = <0x2>;
+ phandle = <0xc6a48>;
+ };
+
+ sspa@c0ffdd00 {
+ name = "sspa";
+ reg = <0xc0ffdd00 0x100>;
+ compatible = "marvell,mmp3-sspa-dai", "marvell,mmp-sspa-dai";
+ status = "unused";
+ clocks = <0x8a6dc 0x14>;
+ interrupts = <0x3>;
+ phandle = <0xc6928>;
+ };
+
+ asram@d1030000 {
+ name = "asram";
+ reg = <0xd1030000 0x20000>;
+ compatible = "marvell,mmp-asram";
+ phandle = <0xc6894>;
+ };
+
+ pcm@0 {
+ name = "pcm";
+ adma-node = <0xc6714>;
+ reg = <0x0 0x0>;
+ compatible = "marvell,mmp-pcm-audio";
+ phandle = <0xc67dc>;
+ };
+
+ adma@c0ffd800 {
+ name = "adma";
+ reg = <0xc0ffd800 0x100>;
+ mmp-mav-dma-channels = <0x3 0x2>;
+ compatible = "marvell,mmp-audio-dma";
+ phandle = <0xc6714>;
+ };
+
+ pcm@1 {
+ name = "pcm";
+ adma-node = <0xc6554>;
+ reg = <0x1 0x0>;
+ compatible = "marvell,mmp-pcm-audio";
+ status = "disabled";
+ phandle = <0xc663c>;
+ };
+
+ adma@c0ffd900 {
+ name = "adma";
+ reg = <0xc0ffd900 0x100>;
+ mmp-mav-dma-channels = <0x5 0x4>;
+ compatible = "marvell,mmp-audio-dma";
+ status = "disabled";
+ phandle = <0xc6554>;
+ };
+
+ camera@d420a000 {
+ name = "camera";
+ compatible = "marvell,mmpcam";
+ reg = <0xd420a000 0x800>;
+ clocks = <0x8a6dc 0x2>;
+ interrupt-parent = <0x8c630>;
+ interrupts = <0x1>;
+ gpios = <0x8dedc 0x96 0x0 0x8dedc 0x66 0x0>;
+ image-sensor = <0x919f0>;
+ i2c-parent = <0x917e8>;
+ sensor = "OV7670";
+ phandle = <0xc1794>;
+ };
+
+ ap-sp@d4290000 {
+ name = "ap-sp";
+ compatible = "olpc,ap-sp";
+ interrupts = <0x28>;
+ clocks = <0x8a6dc 0x8>;
+ reg = <0xd4290000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ phandle = <0xbdf64>;
+
+ mouse@1 {
+ name = "mouse";
+ device_type = "mouse";
+ compatible = "pnpPNP,f03";
+ reg = <0x1>;
+ phandle = <0xc08a4>;
+ };
+
+ keyboard@0 {
+ name = "keyboard";
+ reg = <0x0>;
+ compatible = "pnpPNP,303";
+ device_type = "keyboard";
+ keyboard-type = "us";
+ language = "EN";
+ phandle = <0xbe7ac>;
+ };
+ };
+
+ usb@d4208000 {
+ name = "usb";
+ reg = <0xd4208000 0x200>;
+ clocks = <0x8a6dc 0x5>;
+ interrupts = <0x2c>;
+ dr_mode = "host";
+ phy_type = "utmi";
+ transceiver = <0xb0f54>;
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+ device_type = "ehci";
+ compatible = "marvell,pxau2o-ehci", "usb-ehci";
+ reg-names = "u2o";
+ usb-hub-test-list = "3,2";
+ phandle = <0xb1300>;
+
+ hub@0,0 {
+ name = "hub";
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+ reg = <0x0 0x0>;
+ assigned-address = <0x1>;
+ high-speed = [00];
+ protocol = <0x1>;
+ subclass = <0x0>;
+ class = <0x9>;
+ release = <0x7763>;
+ device-id = <0x608>;
+ vendor-id = <0x5e3>;
+ compatible = "usb5e3,608.7763", "usb5e3,608", "usb5e3,class9.0.1", "usb5e3,class9.0", "usb5e3,class9", "usb,class9.0.1", "usb,class9.0", "usb,class9", "usb,device";
+ vendor$ = [00];
+ device$ = "USB2.0 Hub";
+ serial$ = [00];
+ intr-in-pipe = <0x1>;
+ intr-in-interval = <0xc>;
+ intr-in-size = <0x1>;
+ configuration# = <0x1>;
+ device_type = "usb_hub";
+ hub20-dev = <0x1>;
+ phandle = <0xf4ec0>;
+ };
+ };
+
+ usb2-phy@d4207000 {
+ name = "usb2-phy";
+ reg = <0xd4207000 0x100>;
+ compatible = "mrvl,mmp3-usb2phy";
+ phandle = <0xb0f54>;
+ };
+
+ ec-spi@d4037000 {
+ name = "ec-spi";
+ compatible = "olpc,ec-spi";
+ reg = <0xd4037000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ interrupts = <0x14>;
+ clocks = <0x8b03c 0x15>;
+ ack-gpios = <0x8dedc 0x71 0x1>;
+ cmd-gpios = <0x8dedc 0x9b 0x1>;
+ int-gpios = <0x8dedc 0x9a 0x1>;
+ phandle = <0xae08c>;
+ };
+
+ sd {
+ name = "sd";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ compatible = "simple-bus", "sdhci";
+ ranges = <0xd4280000 0xd4280000 0x2000 0xd4217000 0xd4217000 0x800>;
+ phandle = <0x9f778>;
+
+ sdhci@d4217000 {
+ name = "sdhci";
+ reg = <0xd4217000 0x800>;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc", "sdhci-pxav3";
+ clk-delay-cycles = <0x1f>;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ interrupt-parent = <0x8c918>;
+ interrupts = <0x0>;
+ clocks = <0x8a6dc 0x1b>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x28 0x1>;
+ broken-cd;
+ phandle = <0xeadb8>;
+
+ disk {
+ name = "disk";
+ iconname = "sdmmc";
+ device_type = "block";
+ slot-name = "internal";
+ phandle = <0xeb3c8>;
+ };
+ };
+
+ sdhci@d4280000 {
+ name = "sdhci";
+ reg = <0xd4280000 0x800>;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc", "sdhci-pxav3";
+ clk-delay-cycles = <0x1f>;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ interrupts = <0x27>;
+ clocks = <0x8a6dc 0x3>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x28 0x1>;
+ cd-gpios = <0x8dedc 0x1f 0x1>;
+ wp-inverted;
+ phandle = <0xe99ec>;
+
+ disk {
+ name = "disk";
+ iconname = "sdmmc";
+ device_type = "block";
+ slot-name = "external";
+ phandle = <0xea024>;
+ };
+ };
+
+ sdhci@d4281000 {
+ name = "sdhci";
+ reg = <0xd4281000 0x800>;
+ non-removable;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc", "sdhci-pxav3";
+ clk-delay-cycles = <0x1f>;
+ interrupts = <0x35>;
+ clocks = <0x8a6dc 0xe>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x28 0x1>;
+ broken-cd;
+ power-gpios = <0x8dedc 0x61 0x1>;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ phandle = <0xacb6c>;
+
+ disk {
+ name = "disk";
+ iconname = "sdmmc";
+ device_type = "block";
+ slot-name = "internal";
+ phandle = <0xad1c0>;
+ };
+ };
+
+ sdhci@d4280800 {
+ name = "sdhci";
+ reg = <0xd4280800 0x800>;
+ bus-width = <0x8>;
+ compatible = "mrvl,pxav3-mmc", "sdhci-pxav3";
+ clk-delay-cycles = <0x1f>;
+ non-removable;
+ interrupts = <0x34>;
+ clocks = <0x8a6dc 0x4>;
+ clock-names = "PXA-SDHCLK";
+ power-delay-ms = <0x32 0x1f4>;
+ broken-cd;
+ power-gpios = <0x8dedc 0x22 0x0>;
+ #address-cells = <0x0>;
+ #size-cells = <0x0>;
+ phandle = <0xa358c>;
+
+ wlan {
+ name = "wlan";
+ module-type = "mv8686";
+ thin;
+ fullmac;
+ device_type = "wireless-network";
+ phandle = <0xa3bbc>;
+ };
+ };
+ };
+
+ display@d420b000 {
+ name = "display";
+ reg = <0xd420b000 0x1000>;
+ compatible = "mrvl,pxa168fb";
+ clock-names = "LCDCLK";
+ clocks = <0x8a6dc 0x1>;
+ interrupts = <0x29>;
+ device_type = "display";
+ character-set = "ISO8859-1";
+ iso6429-1983-colors;
+ phandle = <0x99b18>;
+
+ panel {
+ name = "panel";
+ compatible = "mrvl,dumb-panel";
+ model = "OLPC DCON panel";
+ linux,timing-modes = <0x4b0 0x384 0x32 0x364aed0 0x18 0x1a 0x5 0x4 0x6 0x3 0x0 0x98 0x73>;
+ linux,mode-names = "1200x900@50";
+ lcd-dumb-ctrl-regval = <0x2000000d>;
+ lcd-pn-ctrl0-regval = <0x8001100>;
+ control-node = <0xec524>;
+ phandle = <0xec334>;
+ };
+ };
+
+ vmeta@f0400000 {
+ name = "vmeta";
+ reg = <0xf0400000 0x1000>;
+ compatible = "mrvl,mmp2-vmeta";
+ clocks = <0x8a6dc 0xa>;
+ interrupts = <0x1a>;
+ phandle = <0x99a48>;
+ };
+
+ battery@0 {
+ name = "battery";
+ compatible = "olpc,xo1-battery";
+ reg = <0x0 0x0>;
+ phandle = <0x96cf8>;
+ };
+
+ mfg-data {
+ name = "mfg-data";
+ ww;
+ SG = [b1];
+ B# = "QTFFIT2370002C";
+ SS = "EN";
+ SN = "SHC2370000E";
+ BV = "Q7B01";
+ T# = "OFW ASSY test $Revision: 1790 $";
+ U# = "92F80E7E-DF10-98D1-B5FC-21A10A6B80D0";
+ WM = "20-7C-8F-93-14-83";
+ SD = "20120916";
+ P# = "1CL4BZU0KD2";
+ M# = "CL4A";
+ LA = "USA";
+ CC = "XXXXXX";
+ F# = "F6";
+ L# = "C16";
+ S# = "AZCL2LIN003";
+ MN = "XO-4 HS Touch";
+ LO = "en_US.UTF-8";
+ KA = [1e 30 2e 20 12 21 22 23 17 24 25 26 32 31 18 19 10 13 1f 14 16 2f 11 2d 15 2c 0b 00 02 00 03 00 04 00 05 00 06 00 07 00 08 00 09 00 0a 00 02 01 28 01 04 01 05 01 06 01 08 01 28 00 0a 01 0b 01 09 01 0d 01 33 00 0c 00 34 00 35 00 27 01 27 00 33 01 0d 00 34 01 35 01 03 01 1a 00 2b 00 1b 00 07 01 0c 01 29 00 1a 01 2b 01 1b 01 29 01 00 90 6f 4b 41];
+ KM = "olpcm";
+ KL = "us";
+ KV = "olpc";
+ sk = "293";
+ TS = "funin";
+ BD = "u:\\boot\\olpc.fth int:\\runin\\final.fth int:\\boot\\olpc.fth";
+ MS = "cifs:\\\\Administrator:qmsswdl@10.1.0.2\\OLPC_Monitor";
+ NB = "u:\\boot\\olpc.fth net";
+ BT = "86400";
+ phandle = <0x956dc>;
+ };
+
+ flash@d4035000 {
+ name = "flash";
+ clocks = <0x8b03c 0x13>;
+ interrupts = <0x0>;
+ reg = <0xd4035000 0x100>;
+ #address-cells = <0x1>;
+ phandle = <0x94770>;
+
+ dropins@20000 {
+ name = "dropins";
+ reg = <0x20000 0xe0000>;
+ phandle = <0x94d00>;
+ };
+ };
+
+ uart@d4016000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4016000 0x20>;
+ clocks = <0x8b03c 0x20>;
+ interrupts = <0x2e>;
+ status = "disabled";
+ phandle = <0x93440>;
+ };
+
+ uart@d4030000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4030000 0x20>;
+ interrupts = <0x1b>;
+ clocks = <0x8b03c 0xa>;
+ status = "disabled";
+ phandle = <0x93270>;
+ };
+
+ uart@d4017000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4017000 0x20>;
+ clocks = <0x8b03c 0xb>;
+ interrupts = <0x1c>;
+ phandle = <0x93068>;
+ };
+
+ uart@d4018000 {
+ name = "uart";
+ compatible = "mrvl,mmp-uart";
+ reg = <0xd4018000 0x20>;
+ clocks = <0x8b03c 0xc>;
+ interrupts = <0x18>;
+ status = "disabled";
+ phandle = <0x92e98>;
+ };
+
+ i2c@d4034000 {
+ name = "i2c";
+ linux,unit# = <0x4>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupt-parent = <0x8c060>;
+ interrupts = <0x4>;
+ clocks = <0x8b03c 0x1f>;
+ reg = <0xd4034000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x92a28>;
+
+ accelerometer@19 {
+ name = "accelerometer";
+ compatible = "lis3lv02d";
+ reg = <0x19 0x1>;
+ phandle = <0xd892c>;
+ };
+ };
+
+ i2c@d4033000 {
+ name = "i2c";
+ linux,unit# = <0x5>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupt-parent = <0x8c060>;
+ interrupts = <0x2>;
+ clocks = <0x8b03c 0x4>;
+ reg = <0xd4033000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x925b8>;
+
+ touchscreen@50 {
+ name = "touchscreen";
+ reg = <0x50 0x1>;
+ compatible = "zforce";
+ reset-gpios = <0x8dedc 0x62 0x1>;
+ test-gpios = <0x8dedc 0x8b 0x1>;
+ hd-gpios = <0x8dedc 0xc 0x1>;
+ dr-gpios = <0x8dedc 0x63 0x1>;
+ phandle = <0xed074>;
+ };
+ };
+
+ i2c@d4031000 {
+ name = "i2c";
+ linux,unit# = <0x3>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupt-parent = <0x8c060>;
+ interrupts = <0x0>;
+ clocks = <0x8b03c 0x2>;
+ reg = <0xd4031000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x92148>;
+
+ rtc@68 {
+ name = "rtc";
+ compatible = "idt,idt1338-rtc";
+ reg = <0x68 0x1>;
+ phandle = <0xcbd48>;
+ };
+ };
+
+ i2c@d4011000 {
+ name = "i2c";
+ linux,unit# = <0x2>;
+ compatible = "mrvl,mmp-twsi";
+ mrvl,i2c-fast-mode;
+ interrupts = <0x7>;
+ clocks = <0x8b03c 0x1>;
+ reg = <0xd4011000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x91d00>;
+
+ audio-codec@1a {
+ name = "audio-codec";
+ compatible = "realtek,rt5631", "realtek,alc5631";
+ reg = <0x1a 0x1>;
+ dai-name = "rt5631-hifi";
+ phandle = <0xc63c4>;
+ };
+ };
+
+ dcon-i2c {
+ name = "dcon-i2c";
+ compatible = "i2c-gpio";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ gpios = <0x8dedc 0xa7 0x0 0x8dedc 0xa8 0x0>;
+ phandle = <0x91a8c>;
+
+ dcon@d {
+ name = "dcon";
+ compatible = "olpc,xo1.75-dcon", "olpc,xo1-dcon";
+ reg = <0xd 0x1>;
+ gpios = <0x8dedc 0x64 0x0 0x8dedc 0x65 0x0 0x8dedc 0x8e 0x0 0x8dedc 0x7e 0x0>;
+ gpio-names = "stat0", "stat1", "load", "irq";
+ phandle = <0xec524>;
+ };
+ };
+
+ camera-i2c {
+ name = "camera-i2c";
+ compatible = "i2c-gpio";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ gpios = <0x8dedc 0xa6 0x0 0x8dedc 0xa5 0x0>;
+ phandle = <0x917e8>;
+
+ image-sensor@21 {
+ name = "image-sensor";
+ gpios = <0x8dedc 0x96 0x0 0x8dedc 0x66 0x0>;
+ reg = <0x21 0x1>;
+ compatible = "omnivision,ov7670";
+ phandle = <0x919f0>;
+ };
+ };
+
+ cpus {
+ name = "cpus";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ phandle = <0x90c68>;
+
+ cpu@0 {
+ name = "cpu";
+ device_type = "cpu";
+ reg = <0x0>;
+ phandle = <0x90d4c>;
+ };
+ };
+
+ dropin-fs {
+ name = "dropin-fs";
+ phandle = <0x907ac>;
+ };
+
+ null-nvram {
+ name = "null-nvram";
+ phandle = <0x90624>;
+ };
+
+ mfpr@d401e000 {
+ name = "mfpr";
+ reg = <0xd401e000 0x1000>;
+ compatible = "mrvl,pxa-mfpr";
+ mrvl,pin-map = <0x0 0x3a 0x54 0x3b 0x49 0x280 0x4a 0x65 0x170 0x66 0x67 0x0 0x68 0xffffffff 0x1fc 0x69 0xffffffff 0x1f8 0x6a 0xffffffff 0x1f4 0x6b 0xffffffff 0x1f0 0x6c 0xffffffff 0x21c 0x6d 0xffffffff 0x218 0x6e 0xffffffff 0x214 0x6f 0xffffffff 0x200 0x70 0xffffffff 0x244 0x71 0xffffffff 0x25c 0x72 0xffffffff 0x164 0x73 0x7a 0x260 0x7b 0xffffffff 0x148 0x7c 0x8d 0xc 0x8e 0xffffffff 0x8 0x8f 0x97 0x220 0x98 0x98 0x248 0x9a 0x9b 0x254 0x9c 0x9f 0x14c 0xa0 0xffffffff 0x250 0xa1 0xffffffff 0x210 0xa2 0xffffffff 0x20c 0xa3 0xffffffff 0x208 0xa4 0xffffffff 0x204 0xa5 0xffffffff 0x1ec 0xa6 0xffffffff 0x1e8 0xa7 0xffffffff 0x1e4 0xa8 0xffffffff 0x1e0 0xa9 0xaa 0x2c0 0xab 0xffffffff 0x2c8 0x15b 0x15c 0x140 0x15d 0x15e 0x2bc 0x159 0xffffffff 0x2c4 0x15f 0xffffffff 0x160 0xffffffff 0xffffffff 0xffffffff>;
+ phandle = <0x8e8a4>;
+ };
+
+ gpio@d4019000 {
+ name = "gpio";
+ compatible = "mrvl,mmp-gpio", "";
+ reg = <0xd4019000 0x1000>;
+ interrupts = <0x31>;
+ interrupt-names = "gpio_mux";
+ gpio-controller;
+ #gpio-cells = <0x2>;
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ clocks = <0x8b03c 0xd>;
+ clock-names = "GPIO";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ phandle = <0x8dedc>;
+
+ gpio@108 {
+ name = "gpio";
+ reg = <0x108 0x4>;
+ phandle = <0x8e34c>;
+ };
+
+ gpio@104 {
+ name = "gpio";
+ reg = <0x104 0x4>;
+ phandle = <0x8e2e8>;
+ };
+
+ gpio@100 {
+ name = "gpio";
+ reg = <0x100 0x4>;
+ phandle = <0x8e284>;
+ };
+
+ gpio@8 {
+ name = "gpio";
+ reg = <0x8 0x4>;
+ phandle = <0x8e220>;
+ };
+
+ gpio@4 {
+ name = "gpio";
+ reg = <0x4 0x4>;
+ phandle = <0x8e1bc>;
+ };
+
+ gpio@0 {
+ name = "gpio";
+ reg = <0x0 0x4>;
+ phandle = <0x8e158>;
+ };
+ };
+
+ timer@d4014000 {
+ name = "timer";
+ compatible = "mrvl,mmp-timer";
+ reg = <0xd4014000 0x100>;
+ interrupts = <0xd>;
+ clocks = <0x8b03c 0x9>;
+ phandle = <0x8d954>;
+ };
+
+ interrupt-controller@d4282000 {
+ name = "interrupt-controller";
+ reg = <0xd4282000 0x1000>;
+ compatible = "mrvl,mmp2-intc";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ mrvl,intc-nr-irqs = <0x40>;
+ phandle = <0x8b54c>;
+
+ interrupt-controller@1d0 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x5>;
+ interrupts = <0x3a>;
+ reg = <0x1d0 0x4 0x1b8 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8cc00>;
+ };
+
+ interrupt-controller@188 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x14>;
+ interrupts = <0x37>;
+ reg = <0x188 0x4 0x188 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8ca8c>;
+ };
+
+ interrupt-controller@184 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x4>;
+ interrupts = <0x37>;
+ reg = <0x184 0x4 0x17c 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c918>;
+ };
+
+ interrupt-controller@160 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x33>;
+ reg = <0x160 0x4 0x178 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c7a4>;
+ };
+
+ interrupt-controller@1cc {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x2a>;
+ reg = <0x1cc 0x4 0x1b4 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c630>;
+ };
+
+ interrupt-controller@15c {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x1f>;
+ interrupts = <0x23>;
+ reg = <0x15c 0x4 0x174 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c4bc>;
+ };
+
+ interrupt-controller@1c8 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x1e>;
+ reg = <0x1c8 0x4 0x1b0 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c348>;
+ };
+
+ interrupt-controller@1c4 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x3>;
+ interrupts = <0x12>;
+ reg = <0x1c4 0x4 0x1ac 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c1d4>;
+ };
+
+ interrupt-controller@158 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x5>;
+ interrupts = <0x11>;
+ reg = <0x158 0x4 0x170 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8c060>;
+ };
+
+ interrupt-controller@1c0 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x4>;
+ interrupts = <0x8>;
+ reg = <0x1c0 0x4 0x1a8 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8beec>;
+ };
+
+ interrupt-controller@1bc {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x3>;
+ interrupts = <0x6>;
+ reg = <0x1bc 0x4 0x1a4 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8bd78>;
+ };
+
+ interrupt-controller@154 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x2>;
+ interrupts = <0x5>;
+ reg = <0x154 0x4 0x16c 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8bc04>;
+ };
+
+ interrupt-controller@150 {
+ name = "interrupt-controller";
+ mrvl,intc-nr-irqs = <0x4>;
+ interrupts = <0x4>;
+ reg = <0x150 0x4 0x168 0x4>;
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+ reg-names = "mux status", "mux mask";
+ phandle = <0x8ba90>;
+ };
+ };
+
+ apbc@d4015000 {
+ name = "apbc";
+ compatible = "marvell,mmp3-apbc", "mrvl,pxa-apbc";
+ reg = <0xd4015000 0x1000>;
+ #clock-cells = <0x1>;
+ clock-output-names = "RTC", "TWSI1", "TWSI2", "TWSI3", "TWSI4", "ONEWIRE", "KPC", "TB_ROTARY", "SW_JTAG", "TIMERS1", "UART1", "UART2", "UART3", "GPIO", "PWM0", "PWM1", "PWM2", "PWM3", "SSP0", "SSP1", "SSP2", "SSP3", "SSP4", "SSP5", "AIB", "ASFAR", "ASSAR", "USIM", "MPMU", "IPC", "TWSI5", "TWSI6", "UART4", "RIPC", "THSENS1", "CORESIGHT", "THSENS2", "THSENS3", "THSENS4";
+ clock-enable-registers = <0x0 0xf7 0x83 0x8000 0x4 0x77 0x3 0x18cba80 0x8 0x77 0x3 0x18cba80 0xc 0x77 0x3 0x18cba80 0x10 0x77 0x3 0x18cba80 0x14 0x77 0x3 0x18cba80 0x18 0x77 0x3 0x18cba80 0x1c 0x77 0x3 0x18cba80 0x20 0x77 0x3 0x18cba80 0x24 0x77 0x13 0x632ea0 0x2c 0x77 0x13 0x18cba80 0x30 0x77 0x13 0x18cba80 0x34 0x77 0x13 0x18cba80 0x38 0x77 0x3 0x18cba80 0x3c 0x77 0x3 0x18cba80 0x40 0x77 0x3 0x18cba80 0x44 0x77 0x3 0x18cba80 0x48 0x77 0x3 0x18cba80 0x4c 0x77 0x3 0x18cba80 0x50 0x77 0x3 0x18cba80 0x54 0x77 0x3 0x18cba80 0x58 0x77 0x3 0x18cba80 0x5c 0x77 0x3 0x18cba80 0x60 0x77 0x3 0x18cba80 0x64 0x77 0x3 0x18cba80 0x68 0x77 0x3 0x18cba80 0x6c 0x77 0x3 0x18cba80 0x70 0x77 0x3 0x18cba80 0x74 0x77 0x3 0x18cba80 0x78 0x77 0x3 0x18cba80 0x7c 0x77 0x3 0x18cba80 0x80 0x77 0x3 0x18cba80 0x88 0x77 0x13 0x18cba80 0x8c 0x77 0x3 0x18cba80 0x90 0x77 0x3 0x18cba80 0x94 0x7 0x3 0x18cba80 0x98 0x77 0x3 0x18cba80 0x9c 0x77 0x3 0x18cba80 0xa0 0x77 0x3 0x18cba80>;
+ phandle = <0x8b03c>;
+ };
+
+ pmua@d4282800 {
+ name = "pmua";
+ compatible = "marvell,mmp3-apmu", "mrvl,pxa-apmu";
+ reg = <0xd4282800 0x1000>;
+ #clock-cells = <0x1>;
+ clock-output-names = "IRE", "DISPLAY1", "CCIC", "SDH1", "SDH2", "USB", "NF", "DMA", "WTM", "BUS", "VMETA", "GC", "SMC", "MSPRO", "SDH3", "SDH4", "CCIC2", "HSIC1", "FSIC3", "HSI", "AUDIO", "DISPLAY2", "ISP", "EPD", "APB2", "SPMI", "USB3SS", "SDH5", "DSA", "TPIU", "HSIC2", "SLIM", "FASTENET";
+ clock-enable-registers = <0x48 0x19 0x19 0x0 0x4c 0xfffff 0x71b 0x17d78400 0x50 0x3f 0x3f 0x0 0x54 0x1b 0x41b 0xbebc200 0x58 0x1b 0x1b 0xbebc200 0x5c 0x9 0x9 0x1c9c3800 0x60 0x1ff 0xbf 0x5f5e100 0x64 0x9 0x9 0x0 0x68 0x1b 0x1b 0x0 0x6c 0x1 0x1 0x0 0xa4 0x1b 0x1b 0x0 0xcc 0xf 0xf 0x0 0xd4 0x1b 0x1b 0x0 0xd8 0x3f 0x3f 0x0 0xe8 0x1b 0x1b 0xbebc200 0xec 0x1b 0x1b 0xbebc200 0xf4 0x3f 0x3f 0x0 0xf8 0x1b 0x1b 0x0 0x100 0x1b 0x1b 0x0 0x108 0x9 0x9 0x0 0x10c 0x13 0x13 0x0 0x110 0x1b 0x1b 0x0 0x120 0x3f 0x3f 0x0 0x124 0x1b 0x1b 0x0 0x134 0x12 0x12 0x0 0x140 0x1b 0x1b 0x0 0x148 0x9 0x9 0x0 0x15c 0x1b 0x1b 0x0 0x164 0xf 0xf 0x0 0x18c 0x12 0x12 0x0 0xf8 0x1b 0x1b 0x0 0x104 0x1b 0x1b 0x0 0x210 0x1b 0x1b 0x0>;
+ phandle = <0x8a6dc>;
+ };
+
+ lzip {
+ name = "lzip";
+ phandle = <0x69724>;
+ };
+
+ osfile {
+ name = "osfile";
+ phandle = <0x664f4>;
+ };
+
+ memory@0 {
+ name = "memory";
+ available = <0xcf000 0x7ef31000 0x1000 0xbf000>;
+ reg = <0x0 0x80000000>;
+ linux,usable-memory = <0x0 0x7f800000>;
+ phandle = <0x5d410>;
+ };
+
+ aliases {
+ name = "aliases";
+ ip = "//ip";
+ tcp = "ip//tcp";
+ http = "tcp//http";
+ httpd = "tcp//httpd:verbose";
+ smb = "tcp//cifs";
+ cifs = "tcp//cifs";
+ nfs = "net//obp-tftp:last//nfs";
+ rom = "/dropin-fs";
+ dropins = "/dropins";
+ screen = "/display";
+ mmc1 = "/sd/sdhci@d4280800";
+ net = "/wlan";
+ mouse = "/ap-sp/mouse";
+ keyboard = "/keyboard";
+ fsdisk = "int:0";
+ com1 = "/uart@d4017000";
+ serial2 = "/uart@d4017000";
+ mmc2 = "/sd/sdhci@d4280000";
+ ext = "/sd/sdhci@d4280000/disk";
+ emmc = "/sd/sdhci@d4281000/disk";
+ int-sd = "/sd/sdhci@d4217000/disk";
+ u = "/usb/disk";
+ int = "/sd/sdhci@d4281000/disk";
+ mmc0 = "/sd/sdhci@d4281000";
+ mmc3 = "/sd/sdhci@d4217000";
+ last = "/sd/sdhci@d4281000/disk";
+ phandle = <0x30c48>;
+ };
+
+ options {
+ name = "options";
+ diag-switch? = "false";
+ security-mode;
+ security-#badlogins;
+ security-password;
+ nvramrc = [00];
+ use-nvramrc? = "false";
+ silent-mode? = "false";
+ screen-#rows = "999";
+ screen-#columns = "999";
+ ansi-terminal? = "true";
+ boot-device = "/sd/sdhci@d4281000/disk:\\boot\\vmlinuz";
+ boot-file = "ttyS2 ";
+ diag-device = "net";
+ diag-file = [00];
+ watchdog-reboot? = "false";
+ auto-boot? = "true";
+ boot-command = "boot";
+ load-base = "201326592";
+ input-device = "keyboard";
+ output-device = "screen";
+ oem-banner? = "false";
+ oem-banner = [00];
+ oem-logo? = "false";
+ oem-logo;
+ local-mac-address? = "true";
+ ip-dns-server = [00];
+ ip-netmask = "255.255.255.0";
+ ip-domain = [00];
+ ip-router = [00];
+ ip-address = "dhcp";
+ fcode-debug? = "true";
+ client-symbols? = "false";
+ http-proxy = [00];
+ menu? = "true";
+ usb-delay = "350";
+ ramdisk = "/sd/sdhci@d4281000/disk:\\boot\\initrd.img";
+ auto-boot-countdown = [32 00];
+ phandle = <0x30bfc>;
+ };
+
+ openprom {
+ name = "openprom";
+ relative-addressing;
+ aligned-allocator;
+ model = "CL4 Q7B01 Q7B";
+ source-url = "svn://openfirmware.info/openfirmware 3309";
+ built-on = <0x1330553>;
+ phandle = <0x30b68>;
+ };
+
+ chosen {
+ name = "chosen";
+ stdout-#lines = <0x1e>;
+ clock = <0xfdbe15d8>;
+ memory = <0xfdbe3330>;
+ mmu = <0x0>;
+ nvram = <0xfdbe2938>;
+ bootpath = "/sd/sdhci@d4281000/disk:\\boot\\vmlinuz//ext2-file-system:\\boot\\vmlinuz";
+ bootargs = "ttyS2";
+ domain-name = [00];
+ tftp-file = [00];
+ client-name = [00];
+ vendor-options = [00];
+ root-path = [00];
+ cpu = <0xfdbe1858>;
+ ramdisk = "/sd/sdhci@d4281000/disk:\\boot\\initrd.img//ext2-file-system:\\boot\\initrd.img";
+ stdin = <0xfd9fef00>;
+ stdout = <0xfd9feeb8>;
+ linux,initrd-start = <0xbb85800>;
+ linux,initrd-end = <0xc000000>;
+ phandle = <0x30b20>;
+ };
+
+ packages {
+ name = "packages";
+ phandle = <0x30a80>;
+
+ test-instructions {
+ name = "test-instructions";
+ phandle = <0xf0e84>;
+ };
+
+ audio-test {
+ name = "audio-test";
+ phandle = <0xe74b4>;
+ };
+
+ block-fifo {
+ name = "block-fifo";
+ phandle = <0xe5120>;
+ };
+
+ mux {
+ name = "mux";
+ phandle = <0x8fcb4>;
+ };
+
+ twsi {
+ name = "twsi";
+ phandle = <0x8ebd4>;
+ };
+
+ nfs {
+ name = "nfs";
+ phandle = <0x832d4>;
+ };
+
+ null {
+ name = "null";
+ phandle = <0x82d2c>;
+ };
+
+ supplicant {
+ name = "supplicant";
+ phandle = <0x78e90>;
+ };
+
+ cifs {
+ name = "cifs";
+ phandle = <0x755f4>;
+ };
+
+ http {
+ name = "http";
+ phandle = <0x748dc>;
+ };
+
+ tcp {
+ name = "tcp";
+ phandle = <0x6f180>;
+ };
+
+ httpd {
+ name = "httpd";
+ phandle = <0x6c550>;
+ };
+
+ ip {
+ name = "ip";
+ phandle = <0x6993c>;
+ };
+
+ zip-file-system {
+ name = "zip-file-system";
+ phandle = <0x6510c>;
+ };
+
+ ext2-file-system {
+ name = "ext2-file-system";
+ phandle = <0x5eba0>;
+ };
+
+ disk-label {
+ name = "disk-label";
+ phandle = <0x55668>;
+ };
+
+ iso9660-file-system {
+ name = "iso9660-file-system";
+ support;
+ phandle = <0x547cc>;
+ };
+
+ fat-file-system {
+ name = "fat-file-system";
+ support;
+ phandle = <0x4f2e8>;
+ };
+
+ obp-tftp {
+ name = "obp-tftp";
+ phandle = <0x416c8>;
+ };
+
+ deblocker {
+ name = "deblocker";
+ disk-write-fix;
+ phandle = <0x40014>;
+ };
+
+ stringio {
+ name = "stringio";
+ phandle = <0x3ec50>;
+ };
+
+ terminal-emulator {
+ name = "terminal-emulator";
+ iso6429-1983-colors;
+ phandle = <0x3bdd0>;
+ };
+
+ client-services {
+ name = "client-services";
+ phandle = <0x30ab4>;
+ };
+ };
+};
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 095c155..e1ef763 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -7,14 +7,20 @@ obj-y += common.o devices.o time.o irq.o
# SoC support
obj-$(CONFIG_CPU_PXA168) += pxa168.o
obj-$(CONFIG_CPU_PXA910) += pxa910.o
-obj-$(CONFIG_CPU_MMP2) += mmp2.o sram.o
+obj-$(CONFIG_CPU_MMP2) += sram.o
+
+ifeq ($(CONFIG_MACH_MMP2_DT),n)
+obj-$(CONFIG_CPU_MMP2) += mmp2.o
+endif
ifeq ($(CONFIG_COMMON_CLK), )
+ifeq ($(CONFIG_MACH_MMP2_DT),n)
obj-y += clock.o
obj-$(CONFIG_CPU_PXA168) += clock-pxa168.o
obj-$(CONFIG_CPU_PXA910) += clock-pxa910.o
obj-$(CONFIG_CPU_MMP2) += clock-mmp2.o
endif
+endif
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o
obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o
@@ -30,6 +36,6 @@ obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
obj-$(CONFIG_MACH_FLINT) += flint.o
obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
obj-$(CONFIG_MACH_MMP_DT) += mmp-dt.o
-obj-$(CONFIG_MACH_MMP2_DT) += mmp2-dt.o
+obj-$(CONFIG_MACH_MMP2_DT) += clock-dt.o mmp2-dt.o mfp-dt.o
obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
obj-$(CONFIG_MACH_GPLUGD) += gplugd.o
diff --git a/arch/arm/mach-mmp/clock-dt.c b/arch/arm/mach-mmp/clock-dt.c
new file mode 100644
index 0000000..0a2e708
--- /dev/null
+++ b/arch/arm/mach-mmp/clock-dt.c
@@ -0,0 +1,452 @@
+/*
+ * Copyright 2012 One Laptop Per Child
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see .
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*
+ * This file implements the Linux clock API, via the COMMON_CLK framework,
+ * for Marvell PXA-derived silicon, using the device tree to populate the
+ * list of clock providers.
+ *
+ * In PXA silicon, clocks are controlled via the main power management unit
+ * clock controller (APMU) and another clock controller in the ARM
+ * Peripheral Bus unit (APBC). There is a separate register for each
+ * individual clock, with various enable and reset bits, and often with
+ * bits to select one of several sources for the clock.
+ *
+ * The device tree must have nodes for the APMU (compatible=mrvl,pxa-apmu)
+ * and the APBC (compatible=mrvl,pxa-apbc). Each of those nodes must have
+ * a standard "reg" property to declare the base address of the register
+ * block and a "clock-enable-registers" property to define the individual
+ * clock enable registers within that block.
+ *
+ * This file's init function searches for those nodes and uses them to
+ * add clock providers for each entry in the clock-enable-registers
+ * property. "clock-enable-registers" is a cell array of 4-tuples
+ * (offset, clr_mask, value, rate), one tuple for each clock output:
+ * offset - The offset of the enable register within the device's space
+ * clr_mask - The register bits to clear when enabling or disabling
+ * value - The register bits to set when enabling or clear when disabling
+ * rate - The clock rate in Hz.
+ * The index within the array corresponds to the clock specifier in the
+ * clock consumer's "clocks" property - see
+ * Documentation/devicetree/bindings/clock/clock-bindings.txt
+ */
+
+struct clk_mmp {
+ struct clk_hw hw;
+ void __iomem *clk_rst; /* clock reset control register */
+ uint32_t enable_val; /* value for clock enable */
+ uint32_t mask_val; /* mask value for clock enable */
+ unsigned long rate;
+ int enabled;
+};
+
+#define to_clk_mmp(_hw) container_of(_hw, struct clk_mmp, hw)
+
+static void __iomem *apmu_base;
+static int apmu_is_mmp2 = 0; /* Enables special behavior for some power islands */
+static int apmu_is_mmp3 = 0; /* Enables special behavior for some power islands */
+
+static void __iomem *apbc_base;
+static int apbc_is_mmp2 = 0; /* Currently unused but provided for symmetry */
+static int apbc_is_mmp3 = 0; /* Currently unused but provided for symmetry */
+
+static DEFINE_SPINLOCK(clocks_lock);
+
+static void mmp3_audio_island_on(void)
+{
+ void __iomem *clock_reg = apmu_base + 0x10c;
+
+ void __iomem *dsa_reg = apmu_base + 0x164;
+ void __iomem *sram_reg = apmu_base + 0x240;
+ void __iomem *dspa_reg = apmu_base + 0x1e4;
+ uint32_t regval;
+
+ __raw_writel(0x200, clock_reg); /* Power partially on */
+ udelay(10);
+ __raw_writel(0x600, clock_reg); /* Power fully on */
+ udelay(10);
+ __raw_writel(0x1, sram_reg); /* SRAM partially on */
+ udelay(10);
+ __raw_writel(0x3, sram_reg); /* SRAM fully on */
+ udelay(10);
+ __raw_writel(0x7, sram_reg); /* Core partially on */
+ udelay(10);
+ __raw_writel(0xf, sram_reg); /* Core fully on */
+ udelay(10);
+ __raw_writel(0x700, clock_reg); /* Disable isolation */
+
+ __raw_writel(0x604, clock_reg); /* Start redundancy repair */
+ do {
+ } while (__raw_readl(clock_reg) & 4); /* and wait until done */
+
+ __raw_writel(0x1, dsa_reg); /* Unreset AXI */
+ __raw_writel(0x5, dsa_reg); /* Unreset APB */
+
+ regval = __raw_readl(dspa_reg);
+ regval |= 0x10;
+ __raw_writel(regval | 0x10, dspa_reg); /* Enable dummy clocks to SRAMs */
+ udelay(250);
+ __raw_writel(regval & ~0x10, dspa_reg); /* Disable dummy clocks to SRAMs */
+
+ __raw_writel(0x7, dsa_reg); /* Enable AXI clock */
+ __raw_writel(0xf, dsa_reg); /* Enable APB clock */
+}
+
+static void mmp3_audio_island_off(void)
+{
+ void __iomem *clock_reg = apmu_base + 0x10c;
+ void __iomem *dsa_reg = apmu_base + 0x164;
+ void __iomem *sram_reg = apmu_base + 0x240;
+
+ __raw_writel(0x5, dsa_reg); /* Disable AXI and APB clocks */
+ __raw_writel(0x0, dsa_reg); /* Reset AXI and APB clocks */
+ __raw_writel(0x600, clock_reg); /* Disable isolation */
+ __raw_writel(0x3, sram_reg); /* Core off */
+ __raw_writel(0x0, sram_reg); /* SRAM off */
+ __raw_writel(0x000, clock_reg); /* Power switch off */
+}
+
+static void mmp2_audio_island_on(void)
+{
+ void __iomem *clock_reg = apmu_base + 0x10c;
+
+ __raw_writel(0x600, clock_reg); /* Island power fully on */
+ __raw_writel(0x610, clock_reg); /* Enable clock */
+ __raw_writel(0x710, clock_reg); /* Disable isolation */
+ __raw_writel(0x712, clock_reg); /* Release reset */
+}
+
+static void mmp2_audio_island_off(void)
+{
+ void __iomem *clock_reg = apmu_base + 0x10c;
+ __raw_writel(0x710, clock_reg); /* Set peripheral reset */
+ __raw_writel(0x610, clock_reg); /* Enable isolation */
+ __raw_writel(0x600, clock_reg); /* Disable clock */
+ __raw_writel(0x000, clock_reg); /* Power off */
+}
+
+static void clk_mmp_enable_audio(void __iomem *clk_reg)
+{
+ if (apmu_is_mmp3)
+ mmp3_audio_island_on();
+ if (apmu_is_mmp2)
+ mmp2_audio_island_on();
+}
+
+static void clk_mmp_disable_audio(void __iomem *clk_reg)
+{
+ if (apmu_is_mmp3)
+ mmp3_audio_island_off();
+ if (apmu_is_mmp2)
+ mmp2_audio_island_off();
+}
+
+
+static void mmp3_camera_island_on(void)
+{
+ void __iomem *island_ctl = apmu_base + 0x1fc;
+
+ /* The MMP3 docs suggest sleeping for 10us below.
+ * However, a sample XDB script from Marvell used 10ms, and we also
+ * found that sleeping for only 10us sometimes hangs the system
+ * while executing this function. So we use 10ms too. */
+
+ __raw_writel(0, island_ctl); /* Island power off */
+ __raw_writel(0x200, island_ctl); /* Island power partially on */
+ mdelay(10);
+ __raw_writel(0x400, island_ctl); /* Island power fully on */
+ mdelay(10);
+ __raw_writel(0x700, island_ctl); /* Island un-isolated */
+}
+
+static void mmp3_camera_island_off(void)
+{
+ void __iomem *island_ctl = apmu_base + 0x1fc;
+
+ __raw_writel(0, island_ctl); /* Island power off */
+}
+
+static void clk_mmp_enable_ccic(void __iomem *clk_reg)
+{
+ if (apmu_is_mmp3) {
+ mmp3_camera_island_on();
+
+ __raw_writel(0x08238, clk_reg); /* Enable CCIC clocks */
+ __raw_writel(0x1833f, clk_reg); /* Deassert CCIC resets */
+ }
+
+ if (apmu_is_mmp2) {
+ __raw_writel(0x3805b, clk_reg); /* Deassert CCIC resets */
+ }
+}
+
+static void clk_mmp_disable_ccic(void __iomem *clk_reg)
+{
+ __raw_writel(0, clk_reg); /* Turn off and reset CCIC clocks */
+
+ if (apmu_is_mmp3)
+ mmp3_camera_island_off();
+}
+
+int clk_mmp_enable(struct clk_hw *hw)
+{
+ struct clk_mmp *clk_mmp = to_clk_mmp(hw);
+ void __iomem *clk_reg = clk_mmp->clk_rst;
+ uint32_t clk_val;
+
+ /* XXX: Other arches disable interrupts here; do we need to? */
+ spin_lock(&clocks_lock);
+ if (clk_mmp->enabled++ == 0) {
+ switch (clk_reg - apmu_base)
+ {
+ case 0x50: /* CCIC */
+ pr_info("calling clk_mmp_enable_ccic\n");
+ clk_mmp_enable_ccic(clk_reg);
+ break;
+ case 0xf4: /* CCIC2 */
+ clk_mmp_enable_ccic(clk_reg);
+ break;
+ case 0x10c: /* AUDIO */
+ pr_info("calling clk_mmp_enable_audio\n");
+ clk_mmp_enable_audio(clk_reg);
+ break;
+ default:
+ clk_val = __raw_readl(clk_reg);
+ clk_val &= ~clk_mmp->mask_val;
+ clk_val |= clk_mmp->enable_val;
+ __raw_writel(clk_val, clk_reg);
+ }
+ }
+ spin_unlock(&clocks_lock);
+
+ return 0;
+}
+
+void clk_mmp_disable(struct clk_hw *hw)
+{
+ struct clk_mmp *clk_mmp = to_clk_mmp(hw);
+ void __iomem *clk_reg = clk_mmp->clk_rst;
+ uint32_t clk_val;
+
+ WARN_ON(clk_mmp->enabled == 0);
+
+ /* XXX: Other arches disable interrupts here; do we need to? */
+ spin_lock(&clocks_lock);
+ if (--clk_mmp->enabled == 0) {
+ switch (clk_reg - apmu_base)
+ {
+ case 0x50: /* CCIC */
+ pr_info("calling clk_mmp_disable_ccic\n");
+ clk_mmp_disable_ccic(clk_reg);
+ break;
+ case 0xf4: /* CCIC2 */
+ clk_mmp_disable_ccic(clk_reg);
+ break;
+ case 0x10c: /* AUDIO */
+ pr_info("calling clk_mmp_disable_audio\n");
+ clk_mmp_disable_audio(clk_reg);
+ break;
+ default:
+ clk_val = __raw_readl(clk_reg);
+ clk_val &= ~clk_mmp->mask_val;
+ clk_val &= ~clk_mmp->enable_val;
+ __raw_writel(clk_val, clk_reg);
+ }
+ }
+ spin_unlock(&clocks_lock);
+}
+
+int clk_mmp_is_enabled(struct clk_hw *hw)
+{
+ struct clk_mmp *clk_mmp = to_clk_mmp(hw);
+
+ return !!clk_mmp->enabled;
+}
+
+unsigned long clk_mmp_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+{
+ struct clk_mmp *clk_mmp = to_clk_mmp(hw);
+
+ return clk_mmp->rate;
+}
+const struct clk_ops clk_mmp_ops = {
+ .enable = clk_mmp_enable,
+ .disable = clk_mmp_disable,
+ .is_enabled = clk_mmp_is_enabled,
+ .recalc_rate = clk_mmp_recalc_rate,
+};
+
+
+/*
+ * Each dynamically-allocated instance of clk_array contains an
+ * array of clk_mmp structures specifying the set of clock enable registers
+ * within a clock controllers. The MMP2, for example, has 2 clock
+ * controllers - APMU and APBC - each of which will have a clk_array.
+ * The array index is the second cell of the clock consumer's
+ * clock specifier . Phandle is used to locate the
+ * clk_array instance, while index selects a "struct clk" therein.
+ */
+struct clk_array {
+ int num_clocks;
+ struct clk_mmp clks[];
+};
+
+static struct clk *pxa_of_clk_get(struct of_phandle_args *clkspec,
+ void *data)
+{
+ struct clk_array *clk_array = data;
+ int clock_num = clkspec->args[0];
+
+ if (clock_num >= clk_array->num_clocks) {
+ pr_err("%s: clock_num %d too large for num_clocks %d\n", __func__, clock_num, clk_array->num_clocks);
+ return NULL;
+ }
+
+ return (clk_array->clks[clock_num]).hw.clk;
+}
+
+static __init void pxa_of_clk_setup(struct device_node *node, void __iomem **outbase)
+{
+ const __be32 *enable_regs;
+ struct clk *clk;
+ struct clk_mmp *clk_mmp;
+ int rc;
+ int len;
+ int num_clocks;
+ int clock_num;
+ struct resource res;
+ void __iomem *baseaddr;
+ struct clk_array *clk_array;
+ struct clk_init_data init;
+ const char *clockname;
+
+ if (of_address_to_resource(node, 0, &res) != 0) {
+ pr_err("%s: problem with reg property\n", __func__);
+ return;
+ }
+
+ baseaddr = ioremap(res.start, resource_size(&res));
+ *outbase = baseaddr;
+
+ enable_regs = of_get_property(node, "clock-enable-registers", &len);
+ if (!enable_regs || (len % (4 * sizeof(__be32)) != 0)) {
+ pr_err("%s: problem with clock-enable-registers property\n", __func__);
+ return;
+ }
+ num_clocks = len / (4 * sizeof(__be32));
+
+ clk_array = kzalloc(sizeof(struct clk_array) + num_clocks * sizeof(struct clk_mmp), GFP_KERNEL);
+ if (!clk_array) {
+ pr_err("%s: kzalloc() failed\n", __func__);
+ return;
+ }
+ clockname = of_get_property(node, "clock-output-names", NULL);
+ init.ops = &clk_mmp_ops;
+ init.flags = CLK_IS_ROOT;
+ init.parent_names = NULL;
+ init.num_parents = 0;
+
+ clk_array->num_clocks = num_clocks;
+ for (clock_num = 0; clock_num < num_clocks; clock_num++) {
+ clk_mmp = &(clk_array->clks[clock_num]);
+ init.name = clockname;
+ clockname += strlen(clockname) + 1;
+ clk_mmp->hw.init = &init;
+ clk_mmp->clk_rst = baseaddr + be32_to_cpup(enable_regs++);
+ clk_mmp->mask_val = be32_to_cpup(enable_regs++);
+ clk_mmp->enable_val = be32_to_cpup(enable_regs++);
+ clk_mmp->rate = be32_to_cpup(enable_regs++);
+ clk = clk_register(NULL, &clk_mmp->hw);
+ if (IS_ERR(clk)) {
+ pr_err("%s: clk_register() failed\n", __func__);
+ return;
+ }
+ clk_prepare(clk);
+ }
+
+ rc = of_clk_add_provider(node, pxa_of_clk_get, clk_array);
+ if (rc) {
+ pr_err("%s: of_clk_add_provider() failed\n", __func__);
+ return;
+ }
+ return;
+}
+
+static __init void pxa_of_clk_apmu_setup(struct device_node *node)
+{
+ pr_info("matched_pxa_of_clk_apmu_setup\n");
+ apmu_is_mmp3 = 1; /* XXX temporary compatibility - remove before upstreaming */
+ pxa_of_clk_setup(node, &apmu_base);
+}
+
+static __init void pxa_of_clk_apbc_setup(struct device_node *node)
+{
+ pxa_of_clk_setup(node, &apbc_base);
+}
+
+static __init void mmp2_of_clk_apmu_setup(struct device_node *node)
+{
+ apmu_is_mmp2 = 1;
+ pxa_of_clk_setup(node, &apmu_base);
+}
+
+static __init void mmp2_of_clk_apbc_setup(struct device_node *node)
+{
+ pxa_of_clk_setup(node, &apbc_base);
+}
+
+static __init void mmp3_of_clk_apmu_setup(struct device_node *node)
+{
+ apmu_is_mmp3 = 1;
+ pxa_of_clk_setup(node, &apmu_base);
+}
+
+static __init void mmp3_of_clk_apbc_setup(struct device_node *node)
+{
+ apbc_is_mmp3 = 1;
+ pxa_of_clk_setup(node, &apbc_base);
+}
+
+static const __initconst struct of_device_id clk_match[] = {
+ { .compatible = "marvell,mmp3-apmu", .data = mmp3_of_clk_apmu_setup, },
+ { .compatible = "marvell,mmp3-apbc", .data = mmp3_of_clk_apbc_setup, },
+ { .compatible = "marvell,mmp2-apmu", .data = mmp2_of_clk_apmu_setup, },
+ { .compatible = "marvell,mmp2-apbc", .data = mmp2_of_clk_apbc_setup, },
+ { .compatible = "mrvl,pxa-apmu", .data = pxa_of_clk_apmu_setup, },
+ { .compatible = "mrvl,pxa-apbc", .data = pxa_of_clk_apbc_setup, },
+ {}
+};
+
+void __init pxa_clocks_init(void)
+{
+ of_clk_init(clk_match);
+}
+EXPORT_SYMBOL(pxa_clocks_init);
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
index 3c71246..e083b1c 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq.c
@@ -58,7 +58,16 @@ void __iomem *mmp_icu_base;
static struct icu_chip_data icu_data[MAX_ICU_NR];
static int max_icu_nr;
-extern void mmp2_clear_pmic_int(void);
+static void mmp2_clear_pmic_int(void)
+{
+ void __iomem *mfpr_pmic;
+ unsigned long data;
+
+ mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
+ data = __raw_readl(mfpr_pmic);
+ __raw_writel(data | (1 << 6), mfpr_pmic);
+ __raw_writel(data, mfpr_pmic);
+}
static void icu_mask_ack_irq(struct irq_data *d)
{
@@ -329,6 +338,7 @@ void __init mmp2_init_icu(void)
static const struct of_device_id intc_ids[] __initconst = {
{ .compatible = "mrvl,mmp-intc", .data = &mmp_conf },
{ .compatible = "mrvl,mmp2-intc", .data = &mmp2_conf },
+ { .compatible = "mrvl,mmp3-intc", .data = &mmp2_conf },
{}
};
@@ -341,7 +351,9 @@ int __init mmp2_mux_init(struct device_node *parent)
{
struct device_node *node;
const struct of_device_id *of_id;
- struct resource res;
+ const __be32 *addrp;
+ u64 size;
+ unsigned int flags;
int i, irq_base, ret, irq;
u32 nr_irqs, mfp_irq;
@@ -359,20 +371,20 @@ int __init mmp2_mux_init(struct device_node *parent)
ret = -EINVAL;
goto err;
}
- ret = of_address_to_resource(node, 0, &res);
- if (ret < 0) {
+ addrp = of_get_address(node, 0, &size, &flags);
+ if (addrp == NULL) {
pr_err("Not found reg property\n");
ret = -EINVAL;
goto err;
}
- icu_data[i].reg_status = mmp_icu_base + res.start;
- ret = of_address_to_resource(node, 1, &res);
- if (ret < 0) {
+ icu_data[i].reg_status = mmp_icu_base + of_read_ulong(addrp, 1);
+ addrp = of_get_address(node, 1, &size, &flags);
+ if (addrp == NULL) {
pr_err("Not found reg property\n");
ret = -EINVAL;
goto err;
}
- icu_data[i].reg_mask = mmp_icu_base + res.start;
+ icu_data[i].reg_mask = mmp_icu_base + of_read_ulong(addrp, 1);
icu_data[i].cascade_irq = irq_of_parse_and_map(node, 0);
if (!icu_data[i].cascade_irq) {
ret = -EINVAL;
diff --git a/arch/arm/mach-mmp/mfp-dt.c b/arch/arm/mach-mmp/mfp-dt.c
new file mode 100644
index 0000000..87830ba
--- /dev/null
+++ b/arch/arm/mach-mmp/mfp-dt.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright 2012 One Laptop Per Child
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see .
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*
+ * This file initializes the PXA MFP (MultiFunction Pin) driver
+ * from the device tree. The DT must contain a node with
+ * compatible=mrvl,pxa-mfpr. Its "reg" property is used to
+ * determine the MFP device base address. Its "mrvl,pin-map"
+ * property describes the association between GPIO numbers
+ * and offsets in the MFP register block. That pin map contains
+ * an array of "struct mfp_addr_map", except that the DT
+ * property value is in the canonical OF endianness and must
+ * be converted to native CPU endianness.
+ */
+
+static const struct of_device_id mfpr_ids[] __initconst = {
+ { .compatible = "mrvl,pxa-mfpr", .data = NULL },
+ {}
+};
+
+void __init pxa_dt_mfp_init(void)
+{
+ struct device_node *node;
+ void __iomem *baseaddr = NULL;
+ int pinmap_len;
+ const __be32 *of_pinmap;
+ struct mfp_addr_map *map, *pm;
+
+ /* Find the MFPR device node */
+ node = of_find_matching_node(NULL, mfpr_ids);
+ if (!node) {
+ pr_err("Failed to find MFPR device node\n");
+ goto err;
+ }
+
+ /* Get the virtual address of the MFPR device */
+ baseaddr = of_iomap(node, 0);
+ if (!baseaddr) {
+ pr_err("%s: problem with reg property\n", __func__);
+ goto err;
+ }
+
+ /* Get the pinmap property */
+ of_pinmap = of_get_property(node, "mrvl,pin-map", &pinmap_len);
+ if (!of_pinmap) {
+ pr_err("%s: Missing mrvl,pin-map property\n", __func__);
+ goto err;
+ }
+
+ if (!pinmap_len || (pinmap_len % (3 * sizeof(__be32))) != 0) {
+ pr_err("%s: Bad length %d for mrvl,pin-map property\n", __func__, pinmap_len);
+ goto err;
+ }
+
+ /* Convert the pinmap data to native endianness in a temporary buffer */
+ map = kzalloc(pinmap_len, GFP_KERNEL);
+ if (!map) {
+ pr_err("%s: Can't allocate map\n", __func__);
+ goto err;
+ }
+
+ pm = map;
+ while (pinmap_len > 0) {
+ pm->start = be32_to_cpup(of_pinmap++);
+ pm->end = be32_to_cpup(of_pinmap++);
+ pm->offset = be32_to_cpup(of_pinmap++);
+ pinmap_len -= 3 * sizeof(__be32);
+ pm++;
+ }
+
+ /* Initialize the MFP driver from the device tree info */
+ mfp_init_base(baseaddr);
+ mfp_init_addr(map);
+
+ kfree(map);
+
+ return;
+err:
+ if (baseaddr)
+ iounmap(baseaddr);
+ if (map)
+ kfree(map);
+ return;
+}
+postcore_initcall(pxa_dt_mfp_init);
diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c
index 535a5ed..aedff04 100644
--- a/arch/arm/mach-mmp/mmp2-dt.c
+++ b/arch/arm/mach-mmp/mmp2-dt.c
@@ -28,26 +28,15 @@ static struct sys_timer mmp_dt_timer = {
.init = mmp_dt_init_timer,
};
-static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = {
- OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.2", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4016000, "pxa2xx-uart.3", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-gpio", 0xd4019000, "pxa-gpio", NULL),
- OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
- {}
-};
-
static void __init mmp2_dt_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table,
- mmp2_auxdata_lookup, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *mmp2_dt_board_compat[] __initdata = {
"mrvl,mmp2-brownstone",
+ "olpc,xo-1.75",
+ "olpc,xo-cl4",
NULL,
};
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 3a3768c..6db4b93 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -29,6 +29,8 @@
#include "common.h"
+#ifndef CONFIG_OF
+
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
static struct mfp_addr_map mmp2_addr_map[] __initdata = {
@@ -80,21 +82,14 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = {
MFP_ADDR_END,
};
-void mmp2_clear_pmic_int(void)
-{
- void __iomem *mfpr_pmic;
- unsigned long data;
-
- mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
- data = __raw_readl(mfpr_pmic);
- __raw_writel(data | (1 << 6), mfpr_pmic);
- __raw_writel(data, mfpr_pmic);
-}
+#endif /* CONFIG_OF */
+#ifndef CONFIG_OF
void __init mmp2_init_irq(void)
{
mmp2_init_icu();
}
+#endif /* CONFIG_OF */
static int __init mmp2_init(void)
{
@@ -102,8 +97,10 @@ static int __init mmp2_init(void)
#ifdef CONFIG_CACHE_TAUROS2
tauros2_init(0);
#endif
+#ifndef CONFIG_OF
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(mmp2_addr_map);
+#endif /* CONFIG_OF */
pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
mmp2_clk_init();
}
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 936447c..dc604ae 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -45,6 +45,7 @@
#define MIN_DELTA (16)
static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
+extern void __init pxa_clocks_init(void);
/*
* FIXME: the timer needs some delay to stablize the counter capture
@@ -220,6 +221,12 @@ void __init mmp_dt_init_timer(void)
struct device_node *np;
int irq, ret;
+ /* We're calling pxa_clocks_init() here because we want to
+ * bring up clocks after SLAB has come up (common_clk uses
+ * kmalloc), but before timers come up, and that's now.
+ */
+ pxa_clocks_init();
+
np = of_find_matching_node(NULL, mmp_timer_dt_ids);
if (!np) {
ret = -ENODEV;
diff --git a/kernel/printk.c b/kernel/printk.c
index 267ce78..3cd12d6 100644
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -45,6 +45,8 @@
#include
+//extern void printascii(char *);
+
#define CREATE_TRACE_POINTS
#include
@@ -1541,6 +1543,8 @@ asmlinkage int vprintk_emit(int facility, int level,
*/
text_len = vscnprintf(text, sizeof(textbuf), fmt, args);
+ //printascii(text);
+
/* mark and strip a trailing newline */
if (text_len && text[text_len-1] == '\n') {
text_len--;